Hi Kaneko-san,
On Thu, Nov 16, 2017 at 4:16 AM, Yoshihiro Kaneko <[email protected]> wrote:
> From: Takeshi Kihara <[email protected]>
>
> This patch fixes the implementation incorrect of MOD_SEL1 bit[25:24]
> value when STP_ISEN_1_D pin function is selected for IPSR16 bit[27:24].
>
> This is a correction to the incorrect implementation of MOD_SEL register
> pin assignment for R8A7795 SoC specification of R-Car Gen3 Hardware
> User's Manual Rev.0.51E or later.
I will drop "or later" while applying, as starting with Rev.0.52E, it documents
R-Car H3 ES2.0, not ES1.x.
> Fixes: 0b0ffc96dbe3 ("pinctrl: sh-pfc: Initial R8A7795 PFC support)
> Signed-off-by: Takeshi Kihara <[email protected]>
> Signed-off-by: Yoshihiro Kaneko <[email protected]>
Reviewed-by: Geert Uytterhoeven <[email protected]>
i.e. will queue in sh-pfc-for-v4.16.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
