Hi Kaneko-san, On Thu, Nov 16, 2017 at 3:58 PM, Yoshihiro Kaneko <[email protected]> wrote: > From: Takeshi Kihara <[email protected]> > > This patch renames the pin function macro definitions of the GPSR and > IPSR registers value for the RTS{0,1,3,4}# pin. > > This is a correction because GPSR and IPSR register specification for > R8A7795 ES2.0 SoC was changed in R-Car Gen3 Hardware User's Manual > Rev.0.54E.
Thanks for your patch! > Signed-off-by: Takeshi Kihara <[email protected]> > Signed-off-by: Yoshihiro Kaneko <[email protected]> Reviewed-by: Geert Uytterhoeven <[email protected]> i.e. will queue in sh-pfc-for-v4.16, after dropping the remaining "_TANS" from comments. Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
