On Thu, Nov 02, 2017 at 01:47:26PM +0100, Wolfram Sang wrote: > When clearing the ICE bit, all registers fall back to their defaut value. That > allows for some simplifications in the code. > > Tested on a Renesas Lager board (R-Car H2) doing a bunch of consecutive > commands. No spurious interrupts have been observed and the signals look > exactly the same when visualized with sigrok. > > According to the docs, the ICE bit behaviour is the same since the beginning > of > this driver (sh7722) for the migo-r board. > > jacopo: can you please test this series while you work on migo-r anyhow? Thank > you a ton for that! > > Looking forward to other comments, as well...
Whole series applied to i2c/for-next!
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