Dear All,
this patch depends on the following patches:
pinctrl: sh-pfc: r8a7794: Add PWM[0123456] support
pinctrl: sh-pfc: r8a7794: Add tpu groups and function
Thanks,
Fab
> Subject: [PATCH] pinctrl: sh-pfc: r8a7794: Add i2c5 pin groups and function
>
> Add i2c5 pin groups and function to r8a7745 PFC driver.
>
> Signed-off-by: Biju Das <biju....@bp.renesas.com>
> Reviewed-by: Fabrizio Castro <fabrizio.cas...@bp.renesas.com>
> ---
> This patch is based on renesas devel tag renesas-devel-20171218-v4.15-rc4
>
> drivers/pinctrl/sh-pfc/pfc-r8a7794.c | 41
> ++++++++++++++++++++++++++++++++++++
> 1 file changed, 41 insertions(+)
>
> diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
> b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
> index f133b4f..1640024 100644
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7794.c
> @@ -2228,6 +2228,35 @@ enum {
> static const unsigned int i2c4_e_mux[] = {
> I2C4_SCL_E_MARK, I2C4_SDA_E_MARK,
> };
> +/* - I2C5
> ------------------------------------------------------------------- */
> +static const unsigned int i2c5_pins[] = {
> +/* SCL, SDA */
> +RCAR_GP_PIN(4, 14), RCAR_GP_PIN(4, 15),
> +};
> +static const unsigned int i2c5_mux[] = {
> +I2C5_SCL_MARK, I2C5_SDA_MARK,
> +};
> +static const unsigned int i2c5_b_pins[] = {
> +/* SCL, SDA */
> +RCAR_GP_PIN(0, 14), RCAR_GP_PIN(0, 15),
> +};
> +static const unsigned int i2c5_b_mux[] = {
> +I2C5_SCL_B_MARK, I2C5_SDA_B_MARK,
> +};
> +static const unsigned int i2c5_c_pins[] = {
> +/* SCL, SDA */
> +RCAR_GP_PIN(4, 31), RCAR_GP_PIN(4, 30),
> +};
> +static const unsigned int i2c5_c_mux[] = {
> +I2C5_SCL_C_MARK, I2C5_SDA_C_MARK,
> +};
> +static const unsigned int i2c5_d_pins[] = {
> +/* SCL, SDA */
> +RCAR_GP_PIN(3, 13), RCAR_GP_PIN(3, 14),
> +};
> +static const unsigned int i2c5_d_mux[] = {
> +I2C5_SCL_D_MARK, I2C5_SDA_D_MARK,
> +};
> /* - INTC
> ------------------------------------------------------------------- */
> static const unsigned int intc_irq0_pins[] = {
> /* IRQ0 */
> @@ -3821,6 +3850,10 @@ enum {
> SH_PFC_PIN_GROUP(i2c4_c),
> SH_PFC_PIN_GROUP(i2c4_d),
> SH_PFC_PIN_GROUP(i2c4_e),
> +SH_PFC_PIN_GROUP(i2c5),
> +SH_PFC_PIN_GROUP(i2c5_b),
> +SH_PFC_PIN_GROUP(i2c5_c),
> +SH_PFC_PIN_GROUP(i2c5_d),
> SH_PFC_PIN_GROUP(intc_irq0),
> SH_PFC_PIN_GROUP(intc_irq1),
> SH_PFC_PIN_GROUP(intc_irq2),
> @@ -4196,6 +4229,13 @@ enum {
> "i2c4_e",
> };
>
> +static const char * const i2c5_groups[] = {
> +"i2c5",
> +"i2c5_b",
> +"i2c5_c",
> +"i2c5_d",
> +};
> +
> static const char * const intc_groups[] = {
> "intc_irq0",
> "intc_irq1",
> @@ -4537,6 +4577,7 @@ enum {
> SH_PFC_FUNCTION(i2c2),
> SH_PFC_FUNCTION(i2c3),
> SH_PFC_FUNCTION(i2c4),
> +SH_PFC_FUNCTION(i2c5),
> SH_PFC_FUNCTION(intc),
> SH_PFC_FUNCTION(mmc),
> SH_PFC_FUNCTION(msiof0),
> --
> 1.9.1
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