Add the missing clock to CA7 CPU1 node.
Signed-off-by: Biju Das <[email protected]>
---
arch/arm/boot/dts/r8a7745.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 835a282..ae918e9 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -84,6 +84,7 @@
compatible = "arm,cortex-a7";
reg = <1>;
clock-frequency = <1000000000>;
+ clocks = <&cpg CPG_CORE R8A7745_CLK_Z2>;
power-domains = <&sysc R8A7745_PD_CA7_CPU1>;
next-level-cache = <&L2_CA7>;
};
--
1.9.1