Set the capacity-dmips-mhz for r8a7796, that is based on dhrystone. Expected cpu capacity: [email protected]: 1024, [email protected]: 411
Signed-off-by: Gaku Inami <[email protected]> --- arch/arm64/boot/dts/renesas/r8a7796.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi b/arch/arm64/boot/dts/renesas/r8a7796.dtsi index 154df9b..a776d29 100644 --- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi @@ -99,6 +99,7 @@ enable-method = "psci"; clocks =<&cpg CPG_CORE R8A7796_CLK_Z>; operating-points-v2 = <&cluster0_opp>; + capacity-dmips-mhz = <1024>; #cooling-cells = <2>; }; @@ -111,6 +112,7 @@ enable-method = "psci"; clocks =<&cpg CPG_CORE R8A7796_CLK_Z>; operating-points-v2 = <&cluster0_opp>; + capacity-dmips-mhz = <1024>; #cooling-cells = <2>; }; @@ -123,6 +125,7 @@ enable-method = "psci"; clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; + capacity-dmips-mhz = <411>; }; a53_1: cpu@101 { @@ -134,6 +137,7 @@ enable-method = "psci"; clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; + capacity-dmips-mhz = <411>; }; a53_2: cpu@102 { @@ -145,6 +149,7 @@ enable-method = "psci"; clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; + capacity-dmips-mhz = <411>; }; a53_3: cpu@103 { @@ -156,6 +161,7 @@ enable-method = "psci"; clocks =<&cpg CPG_CORE R8A7796_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; + capacity-dmips-mhz = <411>; }; L2_CA57: cache-controller-0 { -- 2.7.4
