From: Biju Das <[email protected]> Add VSP support to SoC DT.
Signed-off-by: Biju Das <[email protected]> Reviewed-by: Chris Paterson <[email protected]> Signed-off-by: Simon Horman <[email protected]> --- arch/arm/boot/dts/r8a7743.dtsi | 27 +++++++++++++++++++++++++++ 1 file changed, 27 insertions(+) diff --git a/arch/arm/boot/dts/r8a7743.dtsi b/arch/arm/boot/dts/r8a7743.dtsi index 11a1263211eb..1d9073ba0ce0 100644 --- a/arch/arm/boot/dts/r8a7743.dtsi +++ b/arch/arm/boot/dts/r8a7743.dtsi @@ -1630,6 +1630,33 @@ status = "disabled"; }; + vsp@fe928000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe928000 0 0x8000>; + interrupts = <GIC_SPI 267 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 131>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 131>; + }; + + vsp@fe930000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe930000 0 0x8000>; + interrupts = <GIC_SPI 246 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 128>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 128>; + }; + + vsp@fe938000 { + compatible = "renesas,vsp1"; + reg = <0 0xfe938000 0 0x8000>; + interrupts = <GIC_SPI 247 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 127>; + power-domains = <&sysc R8A7743_PD_ALWAYS_ON>; + resets = <&cpg 127>; + }; + du: display@feb00000 { compatible = "renesas,du-r8a7743"; reg = <0 0xfeb00000 0 0x40000>, -- 2.11.0
