Hi Shimoda-san,
On Fri, May 11, 2018 at 5:22 AM, Yoshihiro Shimoda
<[email protected]> wrote:
> From: Takeshi Kihara <[email protected]>
>
> This patch implements control of pull-up and pull-down. On this SoC there
> is no simple mapping of GP pins to bias register bits, so we need a table.
>
> Signed-off-by: Takeshi Kihara <[email protected]>
> Signed-off-by: Yoshihiro Shimoda <[email protected]>
Thanks for your patch!
> --- a/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77990.c
> @@ -1227,10 +1248,55 @@ enum {
>
> PINMUX_IPSR_GPSR(IP15_31_28, USB30_OVC),
> PINMUX_IPSR_MSEL(IP15_31_28, USB0_OVC_A,
> SEL_USB_20_CH0_0),
> +
> +/*
> + * Static pins can not be muxed between different functions but
> + * still needs a mark entry in the pinmux list. Add each static
need mark entries
> + * pin to the list without an associated function. The sh-pfc
> + * core will do the right thing and skip trying to mux then pin
mux the pin
> + * while still applying configuration to it
period
I have just sent a patch to fix the other copies, in the hope these grammar
atrocities will stop spreading ;-)
> @@ -1708,8 +1774,263 @@ enum {
> { },
> };
>
> +static const struct pinmux_bias_reg pinmux_bias_regs[] = {
The register definitions look OK to me.
I'll review the actual pin mappings later.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
