On Wed, May 16, 2018 at 03:04:50PM +0200, Ulrich Hecht wrote:
> From: Takeshi Kihara <[email protected]>
>
> This patch adds the device nodes all HSCIF serial ports
> incl. clocks and power domain to the R8A77995 SoC.
>
> Signed-off-by: Takeshi Kihara <[email protected]>
> Signed-off-by: Ulrich Hecht <[email protected]>
> ---
> arch/arm64/boot/dts/renesas/r8a77995.dtsi | 35
> +++++++++++++++++++++++++++++++
> 1 file changed, 35 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> index 2f712ac..4b05dc2 100644
> --- a/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a77995.dtsi
> @@ -240,6 +240,41 @@
> resets = <&cpg 407>;
> };
>
> + hscif0: serial@e6540000 {
> + compatible = "renesas,hscif-r8a77995",
> + "renesas,rcar-gen3-hscif",
> + "renesas,hscif";
> + reg = <0 0xe6540000 0 0x60>;
> + interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 520>,
> + <&cpg CPG_CORE R8A77995_CLK_S3D1>,
Section 56.1 of the User's Manual v1.00 indicates that
the clock is S3D1C (250MHz) rather than S3D1 (266.66... MHz).
Otherwise the patch looks fine to me.
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac1 0x31>, <&dmac1 0x30>,
> + <&dmac2 0x31>, <&dmac2 0x30>;
> + dma-names = "tx", "rx", "tx", "rx";
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 520>;
> + status = "disabled";
> + };
> +
> + hscif3: serial@e66a0000 {
> + compatible = "renesas,hscif-r8a77995",
> + "renesas,rcar-gen3-hscif",
> + "renesas,hscif";
> + reg = <0 0xe66a0000 0 0x60>;
> + interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 517>,
> + <&cpg CPG_CORE R8A77995_CLK_S3D1>,
> + <&scif_clk>;
> + clock-names = "fck", "brg_int", "scif_clk";
> + dmas = <&dmac0 0x37>, <&dmac0 0x36>;
> + dma-names = "tx", "rx";
> + power-domains = <&sysc R8A77995_PD_ALWAYS_ON>;
> + resets = <&cpg 517>;
> + status = "disabled";
> + };
> +
> i2c0: i2c@e6500000 {
> #address-cells = <1>;
> #size-cells = <0>;
> --
> 2.7.4
>
