Hi Sergei,
On Thu, May 17, 2018 at 10:19 PM, Sergei Shtylyov
<sergei.shtyl...@cogentembedded.com> wrote:
> Add the device nodes for 3 more Cortex-A53 CPU cores; adjust the interrupt
> delivery masks for the ARM GIC and Architectured Timer.
>
> Based on the original (and large) patch by Vladimir Barinov.
>
> Signed-off-by: Vladimir Barinov <vladimir.bari...@cogentembedded.com>
> Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Thanks for your patch!
> --- renesas.orig/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> +++ renesas/arch/arm64/boot/dts/renesas/r8a77980.dtsi
> @@ -30,6 +30,36 @@
> enable-method = "psci";
> };
>
> + a53_1: cpu@1 {
> + device_type = "cpu";
> + compatible = "arm,cortex-a53","arm,armv8";
Please stop copying spaceless lists ;-)
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
