[PATCH 040/102] arm64: dts: renesas: condor: add SCIF0 pins

[Simon Horman]

From: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>

Add the (previously omitted) SCIF0 pin data to the Condor board's
device tree.

Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm64/boot/dts/renesas/r8a77980-condor.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts 
b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
index 06cf6845765a..38f11cee42dc 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
+++ b/arch/arm64/boot/dts/renesas/r8a77980-condor.dts
@@ -49,7 +49,22 @@
        clock-frequency = <32768>;
 };
 
+&pfc {
+       scif0_pins: scif0 {
+               groups = "scif0_data";
+               function = "scif0";
+       };
+
+       scif_clk_pins: scif_clk {
+               groups = "scif_clk_b";
+               function = "scif_clk";
+       };
+};
+
 &scif0 {
+       pinctrl-0 = <&scif0_pins>, <&scif_clk_pins>;
+       pinctrl-names = "default";
+
        status = "okay";
 };
 
-- 
2.11.0