From: Sergei Shtylyov <[email protected]> Define the generic R8A77980 part of the CAN-FD device node.
Based on the original (and large) patch by Vladimir Barinov. Signed-off-by: Vladimir Barinov <[email protected]> Signed-off-by: Sergei Shtylyov <[email protected]> [simon: consistently use tabs for indentation] Signed-off-by: Simon Horman <[email protected]> --- arch/arm64/boot/dts/renesas/r8a77980.dtsi | 31 +++++++++++++++++++++++++++++++ 1 file changed, 31 insertions(+) diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi b/arch/arm64/boot/dts/renesas/r8a77980.dtsi index 5c865fcd3986..3a127643d1dc 100644 --- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi @@ -38,6 +38,13 @@ }; }; + /* External CAN clock - to be overridden by boards that provide it */ + can_clk: can { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <0>; + }; + extal_clk: extal { compatible = "fixed-clock"; #clock-cells = <0>; @@ -170,6 +177,30 @@ status = "disabled"; }; + canfd: can@e66c0000 { + compatible = "renesas,r8a77980-canfd", + "renesas,rcar-gen3-canfd"; + reg = <0 0xe66c0000 0 0x8000>; + interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&cpg CPG_MOD 914>, + <&cpg CPG_CORE R8A77980_CLK_CANFD>, + <&can_clk>; + clock-names = "fck", "canfd", "can_clk"; + assigned-clocks = <&cpg CPG_CORE R8A77980_CLK_CANFD>; + assigned-clock-rates = <40000000>; + power-domains = <&sysc R8A77980_PD_ALWAYS_ON>; + status = "disabled"; + + channel0 { + status = "disabled"; + }; + + channel1 { + status = "disabled"; + }; + }; + avb: ethernet@e6800000 { compatible = "renesas,etheravb-r8a77980", "renesas,etheravb-rcar-gen3"; -- 2.11.0
