On Mon, Jul 2, 2018 at 11:41 AM Yoshihiro Shimoda <[email protected]> wrote: > This patch fixes an issue that unexpected retransfering happens > if TCR is set to 0 before rcar_dmac_sync_tcr() writes DE bit to > the CHCR register. For example, sh-sci driver can reproduce this > issue like below: > > In rx_timer_fn(): /* CHCR DE bit may be set to 1 */ > dmaengine_tx_status() > rcar_dmac_tx_status() > rcar_dmac_chan_get_residue() > rcar_dmac_sync_tcr() /* TCR is possible to be set to 0 */ > > According to the description of commit 73a47bd0da66 ("dmaengine: > rcar-dmac: use TCRB instead of TCR for residue"), "this buffered data > will be transferred if CHCR::DE bit was cleared". So, this patch > doesn't need to check TCRB register. > > Fixes: 73a47bd0da66 ("dmaengine: rcar-dmac: use TCRB instead of TCR for > residue") > Signed-off-by: Yoshihiro Shimoda <[email protected]>
Looks reasonable Reviewed-by: Geert Uytterhoeven <[email protected]> Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
