Hi Uli, (with Khiem's address fixed (hopefully))
On Thu, Aug 23, 2018 at 10:22 AM Geert Uytterhoeven <[email protected]> wrote: > On Fri, Aug 17, 2018 at 3:19 PM Ulrich Hecht <[email protected]> wrote: > > This series adds CPU idle support for H3 and M3-W. It's a straight > > up-port from the BSP. > > Thanks for your series! > > > The part that disables cpuidle for the CA53 cores on M3ULCB is a bit > > dodgy. Is it a valid assumption that all M3ULCB boards have an ES1.0 > > SoC? > > Alternatively, is this something that can be handled in the kernel using > soc_device_match()? Given many Salvator-X boards (incl. mine) also have M3-W ES1.0, and PSCI is involved, I have to ask: is this a hardware (M3-W ES1.0) or firmware (PSCI) issue? Gr{oetje,eeting}s, Geert -- Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected] In personal conversations with technical people, I call myself a hacker. But when I'm talking to journalists I just say "programmer" or something like that. -- Linus Torvalds
