From: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>

Describe the performance monitor unit (PMU) for the Cortex-A53 cores in
the R8A77980 SoC's device tree.

Based on the original (and large) patch by Vladimir Barinov.

Signed-off-by: Vladimir Barinov <vladimir.bari...@cogentembedded.com>
Signed-off-by: Sergei Shtylyov <sergei.shtyl...@cogentembedded.com>
Reviewed-by: Geert Uytterhoeven <geert+rene...@glider.be>
Signed-off-by: Simon Horman <horms+rene...@verge.net.au>
---
 arch/arm64/boot/dts/renesas/r8a77980.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/r8a77980.dtsi 
b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
index d3532fd4c94a..1013da3e2ec4 100644
--- a/arch/arm64/boot/dts/renesas/r8a77980.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a77980.dtsi
@@ -98,6 +98,15 @@
                clock-frequency = <0>;
        };
 
+       pmu_a53 {
+               compatible = "arm,cortex-a53-pmu";
+               interrupts-extended = <&gic GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
+                                     <&gic GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-affinity = <&a53_0>, <&a53_1>, <&a53_2>, <&a53_3>;
+       };
+
        psci {
                compatible = "arm,psci-1.0", "arm,psci-0.2";
                method = "smc";
-- 
2.11.0

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