> Subject: [PATCH 1/2] ARM: dts: r8a77470: Add CMT SoC specific support > > Add CMT[01] support to r8a77470 SoC DT. > > Signed-off-by: Biju Das <[email protected]>
Reviewed-by: Fabrizio Castro <[email protected]> > --- > This patch is tested against renesas-dev > --- > arch/arm/boot/dts/r8a77470.dtsi | 32 ++++++++++++++++++++++++++++++++ > 1 file changed, 32 insertions(+) > > diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi > index 74ca5d3..e40f5a9 100644 > --- a/arch/arm/boot/dts/r8a77470.dtsi > +++ b/arch/arm/boot/dts/r8a77470.dtsi > @@ -710,6 +710,38 @@ > compatible = "renesas,prr"; > reg = <0 0xff000044 0 4>; > }; > + > +cmt0: timer@ffca0000 { > +compatible = "renesas,r8a77470-cmt0", > + "renesas,rcar-gen2-cmt0"; > +reg = <0 0xffca0000 0 0x1004>; > +interrupts = <GIC_SPI 142 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; > +clocks = <&cpg CPG_MOD 124>; > +clock-names = "fck"; > +power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; > +resets = <&cpg 124>; > +status = "disabled"; > +}; > + > +cmt1: timer@e6130000 { > +compatible = "renesas,r8a77470-cmt1", > + "renesas,rcar-gen2-cmt1"; > +reg = <0 0xe6130000 0 0x1004>; > +interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>, > + <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>; > +clocks = <&cpg CPG_MOD 329>; > +clock-names = "fck"; > +power-domains = <&sysc R8A77470_PD_ALWAYS_ON>; > +resets = <&cpg 329>; > +status = "disabled"; > +}; > }; > > timer { > -- > 2.7.4 Renesas Electronics Europe Ltd, Dukes Meadow, Millboard Road, Bourne End, Buckinghamshire, SL8 5FH, UK. Registered in England & Wales under Registered No. 04586709.
