Hi Biju,
On Thu, Nov 22, 2018 at 10:23 AM Biju Das <[email protected]> wrote:
> Basic support for the RZ/G1N (R8A7744) SoC. Added placeholders
> to avoid compilation error with the common platform code.
>
> Signed-off-by: Biju Das <[email protected]>
Thanks for your patch!
> --- /dev/null
> +++ b/arch/arm/boot/dts/r8a7744.dtsi
> + soc {
> + pfc: pin-controller@e6060000 {
> + compatible = "renesas,pfc-r8a7744";
> + reg = <0 0xe6060000 0 0x164>;
Given the datasheet mentions (reserved) registers up to offset 0x24c,
you may want to use 0x250 for the register block length.
Reviewed-by: Geert Uytterhoeven <[email protected]>
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- [email protected]
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
