On Mon, Oct 01, 2018 at 02:10:26PM +0100, Phil Edworthy wrote:
> This provides a pinctrl driver for the Renesas R9A06G032 SoC
>
> Based on a patch originally written by Michel Pollet at Renesas.
>
> Signed-off-by: Phil Edworthy <[email protected]>
Hi Phil,
I have accepted (a slightly older posting of) this patch
for v4.21.
> ---
> v7:
> - No changes.
>
> v6:
> - No changes.
>
> v5:
> - No changes.
>
> v4:
> - No changes.
>
> v3:
> - No changes.
>
> v2:
> - Add "renesas,rzn1-pinctrl" compatible fallback string
> - Register size corrected.
> ---
> arch/arm/boot/dts/r9a06g032.dtsi | 8 ++++++++
> 1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r9a06g032.dtsi
> b/arch/arm/boot/dts/r9a06g032.dtsi
> index eaf94976ed6d..2322268bc862 100644
> --- a/arch/arm/boot/dts/r9a06g032.dtsi
> +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> @@ -165,6 +165,14 @@
> status = "disabled";
> };
>
> + pinctrl: pin-controller@40067000 {
> + compatible = "renesas,r9a06g032-pinctrl",
> "renesas,rzn1-pinctrl";
> + reg = <0x40067000 0x1000>, <0x51000000 0x480>;
> + clocks = <&sysctrl R9A06G032_HCLK_PINCONFIG>;
> + clock-names = "bus";
> + status = "okay";
> + };
> +
> gic: gic@44101000 {
> compatible = "arm,cortex-a7-gic", "arm,gic-400";
> interrupt-controller;
> --
> 2.17.1
>
