Hello! On 12/14/2018 12:37 PM, Fabrizio Castro wrote:
> Add the device nodes for all MSIOF SPI controllers on RZ/G2E SoC. > > Signed-off-by: Fabrizio Castro <[email protected]> > --- > arch/arm64/boot/dts/renesas/r8a774c0.dtsi | 62 > +++++++++++++++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > index 9532d29..9bd66b1 100644 > --- a/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a774c0.dtsi > @@ -855,6 +855,68 @@ > status = "disabled"; > }; > > + msiof0: spi@e6e90000 { > + compatible = "renesas,msiof-r8a774c0", > + "renesas,rcar-gen3-msiof"; > + reg = <0 0xe6e90000 0 0x0064>; Do we really need the leading zeros in the size cells? > + interrupts = <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&cpg CPG_MOD 211>; > + dmas = <&dmac1 0x41>, <&dmac1 0x40>, > + <&dmac2 0x41>, <&dmac2 0x40>; > + dma-names = "tx", "rx", "tx", "rx"; > + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; > + resets = <&cpg 211>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + }; [...] Same question for the other instances of MSIOF. MBR, Sergei
