Hello! On 02/08/2019 02:13 PM, Simon Horman wrote:
> From: Fabrizio Castro <[email protected]> > > This patch defines OOP tables for all CPUs, similarly to > what done by Takeshi Kihara and Yoshihiro Kaneko for the > R8A77990. > > Signed-off-by: Fabrizio Castro <[email protected]> > Signed-off-by: Simon Horman <[email protected]> [...] > @@ -55,6 +76,8 @@ > power-domains = <&sysc R8A774C0_PD_CA53_CPU0>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > + clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; Need space after =... > + operating-points-v2 = <&cluster1_opp>; > }; > > a53_1: cpu@1 { > @@ -64,6 +87,8 @@ > power-domains = <&sysc R8A774C0_PD_CA53_CPU1>; > next-level-cache = <&L2_CA53>; > enable-method = "psci"; > + clocks =<&cpg CPG_CORE R8A774C0_CLK_Z2>; Here as well... > + operating-points-v2 = <&cluster1_opp>; > }; > > L2_CA53: cache-controller-0 { MBR, Sergei
