Hi Wolfram,
Thanks for your patch.
On 2019-02-08 20:30:02 +0100, Wolfram Sang wrote:
> From: Takeshi Saito <takeshi.saito...@renesas.com>
>
> SCC is used for SDR104/HS200/HS400. We need to change SCC_DT2FF
> according to the mode. If it is inappropriate, CRC error tends to occur.
>
> This adds variable "tap_hs400" for HS400 mode and configures SCC_DT2FF
> as needed.
>
> Signed-off-by: Takeshi Saito <takeshi.saito...@renesas.com>
> [wsa: rebased to upstream and updated commit message]
> Signed-off-by: Wolfram Sang <wsa+rene...@sang-engineering.com>
I think this looks good.
Reviewed-by: Niklas Söderlund <niklas.soderl...@ragnatech.se>
> ---
>
> I don't have a testcase currently, so I don't think this is stable material.
> If
> this ever changes, we can have it added to stable later. But I am open for
> other opinions here. Tested on Salvator-XS with Renesas R-Car M3N, no
> regressions in both detecting HS400 and transferring large files.
>
> drivers/mmc/host/renesas_sdhi.h | 2 ++
> drivers/mmc/host/renesas_sdhi_core.c | 8 ++++++++
> drivers/mmc/host/renesas_sdhi_internal_dmac.c | 1 +
> 3 files changed, 11 insertions(+)
>
> diff --git a/drivers/mmc/host/renesas_sdhi.h b/drivers/mmc/host/renesas_sdhi.h
> index da1e49c45bec..8394a7bb1fc1 100644
> --- a/drivers/mmc/host/renesas_sdhi.h
> +++ b/drivers/mmc/host/renesas_sdhi.h
> @@ -15,6 +15,7 @@
> struct renesas_sdhi_scc {
> unsigned long clk_rate; /* clock rate for SDR104 */
> u32 tap; /* sampling clock position for SDR104 */
> + u32 tap_hs400; /* sampling clock position for HS400 */
> };
>
> struct renesas_sdhi_of_data {
> @@ -49,6 +50,7 @@ struct renesas_sdhi {
> struct pinctrl_state *pins_default, *pins_uhs;
> void __iomem *scc_ctl;
> u32 scc_tappos;
> + u32 scc_tappos_hs400;
> };
>
> #define host_to_priv(host) \
> diff --git a/drivers/mmc/host/renesas_sdhi_core.c
> b/drivers/mmc/host/renesas_sdhi_core.c
> index 7e2a75c4f36f..71e13844df6c 100644
> --- a/drivers/mmc/host/renesas_sdhi_core.c
> +++ b/drivers/mmc/host/renesas_sdhi_core.c
> @@ -337,6 +337,10 @@ static void renesas_sdhi_hs400_complete(struct
> tmio_mmc_host *host)
> /* Set HS400 mode */
> sd_ctrl_write16(host, CTL_SDIF_MODE, 0x0001 |
> sd_ctrl_read16(host, CTL_SDIF_MODE));
> +
> + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF,
> + priv->scc_tappos_hs400);
> +
> sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,
> (SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |
> SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) |
> @@ -396,6 +400,9 @@ static void renesas_sdhi_reset_hs400_mode(struct
> tmio_mmc_host *host,
> /* Reset HS400 mode */
> sd_ctrl_write16(host, CTL_SDIF_MODE, ~0x0001 &
> sd_ctrl_read16(host, CTL_SDIF_MODE));
> +
> + sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_DT2FF, priv->scc_tappos);
> +
> sd_scc_write32(host, priv, SH_MOBILE_SDHI_SCC_TMPPORT2,
> ~(SH_MOBILE_SDHI_SCC_TMPPORT2_HS400EN |
> SH_MOBILE_SDHI_SCC_TMPPORT2_HS400OSEL) &
> @@ -786,6 +793,7 @@ int renesas_sdhi_probe(struct platform_device *pdev,
> if (taps[i].clk_rate == 0 ||
> taps[i].clk_rate == host->mmc->f_max) {
> priv->scc_tappos = taps->tap;
> + priv->scc_tappos_hs400 = taps->tap_hs400;
> hit = true;
> break;
> }
> diff --git a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> index 92c9b15252da..9dfafa2a90a3 100644
> --- a/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> +++ b/drivers/mmc/host/renesas_sdhi_internal_dmac.c
> @@ -81,6 +81,7 @@ static struct renesas_sdhi_scc rcar_gen3_scc_taps[] = {
> {
> .clk_rate = 0,
> .tap = 0x00000300,
> + .tap_hs400 = 0x00000704,
> },
> };
>
> --
> 2.11.0
>
--
Regards,
Niklas Söderlund
