Hi Dong-san,
On Thu, Apr 11, 2019 at 04:54:06PM +0900, Cao Van Dong wrote:
> Add can{0|1} nodes to dtsi for CAN support on the RZ/G1C (r8a77470) SoC.
>
> Signed-off-by: Cao Van Dong <[email protected]>
> ---
> arch/arm/boot/dts/r8a77470.dtsi | 26 ++++++++++++++++++++++++++
> 1 file changed, 26 insertions(+)
>
> diff --git a/arch/arm/boot/dts/r8a77470.dtsi b/arch/arm/boot/dts/r8a77470.dtsi
> index 7d1fe2f..97c51c5 100644
> --- a/arch/arm/boot/dts/r8a77470.dtsi
> +++ b/arch/arm/boot/dts/r8a77470.dtsi
> @@ -757,6 +757,32 @@
> status = "disabled";
> };
>
> + can0: can@e6e80000 {
> + compatible = "renesas,can-r8a77470",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e80000 0 0x1000>;
> + interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 916>,
> + <&cpg CPG_CORE R8A77470_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
This patch makes use of can_clk which does not exist.
I think a good solution to this problem would be to squash the
following patch into this one:
[PATCH v2 13/20] ARM: dts: r8a77470: Add can clocks
> + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> + resets = <&cpg 916>;
> + status = "disabled";
> + };
> +
> + can1: can@e6e88000 {
> + compatible = "renesas,can-r8a77470",
> + "renesas,rcar-gen2-can";
> + reg = <0 0xe6e88000 0 0x1000>;
> + interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
> + clocks = <&cpg CPG_MOD 915>,
> + <&cpg CPG_CORE R8A77470_CLK_RCAN>, <&can_clk>;
> + clock-names = "clkp1", "clkp2", "can_clk";
> + power-domains = <&sysc R8A77470_PD_ALWAYS_ON>;
> + resets = <&cpg 915>;
> + status = "disabled";
> + };
> +
> sdhi0: sd@ee100000 {
> compatible = "renesas,sdhi-r8a77470",
> "renesas,rcar-gen2-sdhi";
> --
> 2.7.4
>
