On Sat, Sep 7, 2019 at 5:16 PM <[email protected]> wrote: > > From: Marek Vasut <[email protected]> > > Add dma-ranges property into /soc node to describe the DMA capabilities > of the bus. This is currently needed to translate PCI DMA ranges, which > are limited to 32bit addresses.
FYI, I've started working on this problem and issues around dma-ranges/dma_mask. Hopefully I'll get some patches out next week. > Signed-off-by: Marek Vasut <[email protected]> > Cc: Geert Uytterhoeven <[email protected]> > Cc: Wolfram Sang <[email protected]> > Cc: [email protected] > Cc: [email protected] > To: [email protected] > --- > NOTE: This is needed for the following patches to work correctly: > https://patchwork.ozlabs.org/patch/1144870/ > https://patchwork.ozlabs.org/patch/1144871/ First I'm seeing those... Well, I do have v7 from 2+ years ago... Not sure if these take into account the new dma_bus_mask, but that should simplify solving the issue. > --- > arch/arm64/boot/dts/renesas/r8a7795.dtsi | 1 + > arch/arm64/boot/dts/renesas/r8a7796.dtsi | 1 + > arch/arm64/boot/dts/renesas/r8a77965.dtsi | 1 + > 3 files changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > index 95deff66eeb6..2102140a6723 100644 > --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi > +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi > @@ -330,6 +330,7 @@ > #address-cells = <2>; > #size-cells = <2>; > ranges; > + dma-ranges = <0 0x40000000 0 0x40000000 0 0xc0000000>; Is the limitation in the bus or the PCI bridge or both? The commit message sounds like it's the PCI bridge in which case this is wrong (or incomplete). 'dma-ranges' should be on the bus node where the restriction/translation exists. For PCI devices, that's the PCI bridge node. So a 32-bit only PCI bridge should have a dma-ranges size of 4GB. If the SoC bus has more restrictions, then that should be in the PCI bridge parent assuming that restriction also applies to other devices. Rob
