Enable support for the IRQC on RZ/A1H, which is a small front-end to the GIC. This allows to use up to 8 external interrupts with configurable sense select.
Signed-off-by: Geert Uytterhoeven <[email protected]> Reviewed-by: Simon Horman <[email protected]> --- v2: - Add Reviewed-by, - Add "renesas,gic-spi-base". --- arch/arm/boot/dts/r7s72100.dtsi | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm/boot/dts/r7s72100.dtsi b/arch/arm/boot/dts/r7s72100.dtsi index 2211f88ede2ad351..52855db63a60580c 100644 --- a/arch/arm/boot/dts/r7s72100.dtsi +++ b/arch/arm/boot/dts/r7s72100.dtsi @@ -670,6 +670,15 @@ status = "disabled"; }; + irqc: interrupt-controller@fcfef800 { + compatible = "renesas,r7s72100-irqc", + "renesas,rza1-irqc"; + #interrupt-cells = <2>; + interrupt-controller; + reg = <0xfcfef800 0x6>; + renesas,gic-spi-base = <0>; + }; + mtu2: timer@fcff0000 { compatible = "renesas,mtu2-r7s72100", "renesas,mtu2"; reg = <0xfcff0000 0x400>; -- 2.17.1
