On 06/22/2011 03:25 PM, Anand Kumar N wrote: > Instead of hardcoding the parent clock in platform/bootloader code ,is > it not possible to select/set the > parent clock based on the pixel clk(plat data) having the least delta > with the 9 src clks.with this change I have checked it for WA101S.
While at first sight this may look as an awesome idea I don't really believe it is. There might be other criteria that need to be considered, like continuous clock availability or frequency stability. That said we could possibly have the driver setting sclk_fimd frequency based on display planes' properties (this was my initial suggestion) but sclk_fimd parent should be fixed either by bootloader or board initialization code. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
