Thomas Abraham wrote: > > s3c64xx and higher SoC's include the interrupt mask and pending registers > in the uart controller, unlike the s3c24xx SoC's which have these registers > in the interrupt controller. When the mask and pending registers are part > of the uart controller, it is easier to manage interrupts with a single > interrupt rather than having to create 3 seperate tx/rx/err interrupts. > > This patch modifies the tx/rx/err uart interrupt handling for s3c64xx > SoC's and higher by registering a single interrupt handler. This makes > it easier to add device tree support as well. > > Suggested-by: Grant Likely <[email protected]> > CC: Ben Dooks <[email protected]> > Signed-off-by: Thomas Abraham <[email protected]> > --- > Tested on Exynos4 smdkv310 only. If this approach is acceptable, it will be > tested it on s3c64xx and all s5p SoC's (should work on all as the changes > are generic). This is a bulky patch but it will split into smaller patches > if the approach is acceptable. > Hi Thomas,
Hmm, could you please test this on other boards before split? And I need to check whether this is available on s3c24xx SoCs or not... Thanks. Best regards, Kgene. -- Kukjin Kim <[email protected]>, Senior Engineer, SW Solution Development Team, Samsung Electronics Co., Ltd. -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
