Tomasz, On Wed, Jun 12, 2013 at 2:19 PM, Tomasz Figa <[email protected]> wrote: > Hmm, if done properly, it could simplify PLL registration in SoC clock > initialization code a lot. > > I'm not sure if this is really the best solution (feel free to suggest > anything better), but we could put PLLs in an array, like other clocks, > e.g. > > ... exynos4210_pll_clks[] = { > CLK_PLL45XX(...), > CLK_PLL45XX(...), > CLK_PLL46XX(...), > CLK_PLL46XX(...), > }; > > and then just call a helper like > > samsung_clk_register_pll(exynos4210_pll_clks, > ARRAY_SIZE(exynos4210_pll_clks));
Something like that looks like what I was thinking. I'd have to see it actually coded up to see if there's something I'm missing that would prevent us from doing that, but I don't see anything. -Doug -- To unsubscribe from this list: send the line "unsubscribe linux-samsung-soc" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
