reg->triminfo_data is used only in exynos_tmu_initialize() and
the code has already different paths for Exynos5440 and other
SoC types (on which TRIMINFO_DATA register offset is identical)
so the register abstraction is not needed and can be removed.

There should be no functional changes caused by this patch.

Cc: Naveen Krishna Chatradhi <ch.nav...@samsung.com>
Cc: Amit Daniel Kachhap <amit.dan...@samsung.com>
Cc: Lukasz Majewski <l.majew...@samsung.com>
Cc: Eduardo Valentin <edubez...@gmail.com>
Cc: Zhang Rui <rui.zh...@intel.com>
Signed-off-by: Bartlomiej Zolnierkiewicz <b.zolnier...@samsung.com>
Acked-by: Kyungmin Park <kyungmin.p...@samsung.com>
---
 drivers/thermal/samsung/exynos_tmu.c      | 10 +++++-----
 drivers/thermal/samsung/exynos_tmu.h      |  3 ---
 drivers/thermal/samsung/exynos_tmu_data.c |  6 ------
 3 files changed, 5 insertions(+), 14 deletions(-)

diff --git a/drivers/thermal/samsung/exynos_tmu.c 
b/drivers/thermal/samsung/exynos_tmu.c
index 092ab69..e0e1151 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -165,22 +165,22 @@ static int exynos_tmu_initialize(struct platform_device 
*pdev)
                switch (data->id) {
                case 0:
                        trim_info = readl(data->base +
-                       EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
+                       EXYNOS5440_EFUSE_SWAP_OFFSET + 
EXYNOS5440_TMU_S0_7_TRIM);
                        break;
                case 1:
-                       trim_info = readl(data->base + reg->triminfo_data);
+                       trim_info = readl(data->base + 
EXYNOS5440_TMU_S0_7_TRIM);
                        break;
                case 2:
                        trim_info = readl(data->base -
-                       EXYNOS5440_EFUSE_SWAP_OFFSET + reg->triminfo_data);
+                       EXYNOS5440_EFUSE_SWAP_OFFSET + 
EXYNOS5440_TMU_S0_7_TRIM);
                }
        } else {
                /* On exynos5420 the triminfo register is in the shared space */
                if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
                        trim_info = readl(data->base_second +
-                                                       reg->triminfo_data);
+                                               EXYNOS_TMU_REG_TRIMINFO);
                else
-                       trim_info = readl(data->base + reg->triminfo_data);
+                       trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
        }
        data->temp_error1 = trim_info & EXYNOS_TMU_TEMP_MASK;
        data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
diff --git a/drivers/thermal/samsung/exynos_tmu.h 
b/drivers/thermal/samsung/exynos_tmu.h
index f67203b..de20dcc 100644
--- a/drivers/thermal/samsung/exynos_tmu.h
+++ b/drivers/thermal/samsung/exynos_tmu.h
@@ -76,7 +76,6 @@ enum soc_type {
  * struct exynos_tmu_register - register descriptors to access registers and
  * bitfields. The register validity, offsets and bitfield values may vary
  * slightly across different exynos SOC's.
- * @triminfo_data: register containing 2 pont trimming data
  * @triminfo_ctrl: trim info controller register.
  * @triminfo_ctrl_count: the number of trim info controller register.
  * @tmu_ctrl: TMU main controller register.
@@ -111,8 +110,6 @@ enum soc_type {
  * @tmu_pmin: register to get/set the Pmin value.
  */
 struct exynos_tmu_registers {
-       u32     triminfo_data;
-
        u32     triminfo_ctrl[MAX_TRIMINFO_CTRL_REG];
        u32     triminfo_ctrl_count;
 
diff --git a/drivers/thermal/samsung/exynos_tmu_data.c 
b/drivers/thermal/samsung/exynos_tmu_data.c
index 54d30bc..0f1f1f1 100644
--- a/drivers/thermal/samsung/exynos_tmu_data.c
+++ b/drivers/thermal/samsung/exynos_tmu_data.c
@@ -26,7 +26,6 @@
 
 #if defined(CONFIG_CPU_EXYNOS4210)
 static const struct exynos_tmu_registers exynos4210_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
        .tmu_status = EXYNOS_TMU_REG_STATUS,
        .tmu_cur_temp = EXYNOS_TMU_REG_CURRENT_TEMP,
@@ -86,7 +85,6 @@ struct exynos_tmu_init_data const exynos4210_default_tmu_data 
= {
 
 #if defined(CONFIG_SOC_EXYNOS3250)
 static const struct exynos_tmu_registers exynos3250_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON1,
        .triminfo_ctrl[1] = EXYNOS_TMU_TRIMINFO_CON2,
        .triminfo_ctrl_count = 2,
@@ -173,7 +171,6 @@ struct exynos_tmu_init_data const 
exynos3250_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS4412) || defined(CONFIG_SOC_EXYNOS5250)
 static const struct exynos_tmu_registers exynos4412_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .triminfo_ctrl[0] = EXYNOS_TMU_TRIMINFO_CON2,
        .triminfo_ctrl_count = 1,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
@@ -271,7 +268,6 @@ struct exynos_tmu_init_data const 
exynos5250_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS5260)
 static const struct exynos_tmu_registers exynos5260_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
        .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
        .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
@@ -354,7 +350,6 @@ struct exynos_tmu_init_data const 
exynos5260_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS5420)
 static const struct exynos_tmu_registers exynos5420_tmu_registers = {
-       .triminfo_data = EXYNOS_TMU_REG_TRIMINFO,
        .tmu_ctrl = EXYNOS_TMU_REG_CONTROL,
        .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
        .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
@@ -445,7 +440,6 @@ struct exynos_tmu_init_data const 
exynos5420_default_tmu_data = {
 
 #if defined(CONFIG_SOC_EXYNOS5440)
 static const struct exynos_tmu_registers exynos5440_tmu_registers = {
-       .triminfo_data = EXYNOS5440_TMU_S0_7_TRIM,
        .tmu_ctrl = EXYNOS5440_TMU_S0_7_CTRL,
        .therm_trip_mode_shift = EXYNOS_TMU_TRIP_MODE_SHIFT,
        .therm_trip_mode_mask = EXYNOS_TMU_TRIP_MODE_MASK,
-- 
1.8.2.3

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