On 11.11.2016 10:44, Hannes Reinecke wrote: > The megaraid_sas HBA only has a single register for I/O submission, > which will be hit pretty hard with scsi-mq. To ensure that the > PCI writes have made it across we need to add a mmio barrier > after each write; otherwise I've been seeing spurious command > completions and I/O stalls.
Why is it needed that the PCI write reaches the hw exactly at this point? Is it possible that this is a hw deficiency like that the hw can't handle communication without tiny pauses, and so possible to remove in next generation? Thanks, Tomas > > Signed-off-by: Hannes Reinecke <[email protected]> > --- > drivers/scsi/megaraid/megaraid_sas_fusion.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/scsi/megaraid/megaraid_sas_fusion.c > b/drivers/scsi/megaraid/megaraid_sas_fusion.c > index aba53c0..729a654 100644 > --- a/drivers/scsi/megaraid/megaraid_sas_fusion.c > +++ b/drivers/scsi/megaraid/megaraid_sas_fusion.c > @@ -196,6 +196,7 @@ inline void megasas_return_cmd_fusion(struct > megasas_instance *instance, > le32_to_cpu(req_desc->u.low)); > > writeq(req_data, &instance->reg_set->inbound_low_queue_port); > + mmiowb(); > #else > unsigned long flags; > -- To unsubscribe from this list: send the line "unsubscribe linux-scsi" in the body of a message to [email protected] More majordomo info at http://vger.kernel.org/majordomo-info.html
