Hi,
this patch recognizes all Timedia/Sunix cards correctly (I hope).
Sunix Support was helpful to provide pci ids and BAR usage.

A comprehensive list of these cards is included at:
http://members.hyperlink.net.au/~chart/download/pcidevs.txt
(Version 161 needs some corrections, that will hopefully appear
 in 162).
I will merge these back to the linux pci id database...

Ted, feel free to submit this for inclusion to 2.4.0
or comment on it.

Regards, Gunther



--- linux-2.4.0-test1-orig/drivers/char/serial.c        Sun May 14 10:46:21 2000
+++ linux/drivers/char/serial.c Sat Jun 17 22:04:59 2000
@@ -3620,6 +3620,7 @@
        unsigned long port;
        int base_idx;
        int max_port;
+       int offset;
 
        base_idx = SPCI_FL_GET_BASE(board->flags);
        if (board->flags & SPCI_FL_BASE_TABLE)
@@ -3630,12 +3631,32 @@
                if (idx >= max_port)
                        return 1;
        }
+       offset = board->first_uart_offset;
+
+       /* Timedia/SUNIX */
+        if(dev->vendor == PCI_VENDOR_ID_TIMEDIA )  /* 0x1409 */
+                switch(idx) {
+                        case 0: base_idx=0;
+                                break;
+                        case 1: base_idx=0; offset=8;
+                               break;
+                       case 2: base_idx=1; 
+                               break;
+                       case 3: base_idx=1; offset=8;
+                               break;
+                       case 4: /* BAR 2*/
+                       case 5: /* BAR 3 */
+                       case 6: /* BAR 4*/
+                       case 7: base_idx=idx-2; /* BAR 5*/
+               }
+       
                        
-       port = PCI_BASE_ADDRESS(dev, base_idx) + board->first_uart_offset;
+       port = PCI_BASE_ADDRESS(dev, base_idx) + offset;
 
        if ((board->flags & SPCI_FL_BASE_TABLE) == 0)
                port += idx * (board->uart_offset ? board->uart_offset : 8);
 
+
        if (IS_PCI_REGION_IOPORT(dev, base_idx)) {
                state->port = port;
                return 0;
@@ -4005,9 +4026,75 @@
        {       PCI_VENDOR_ID_OXSEMI, PCI_DEVICE_ID_OXSEMI_16PCI95N,
                PCI_ANY_ID, PCI_ANY_ID,
                SPCI_FL_BASE0 | SPCI_FL_REGION_SZ_CAP, 32, 115200 },
-       {       PCI_VENDOR_ID_TIMEDIA, PCI_DEVICE_ID_TIMEDIA_1889,
-               PCI_ANY_ID, PCI_ANY_ID,
-               SPCI_FL_BASE0 , 2, 921600 },
+       /*      PCI_VENDOR_ID_TIMEDIA/Sunix, PCI_DEVICE_ID_TIMEDIA_1889, */
+       {       0x1409, 0x7168, 0x1409, 0x0002, 0, 2, 921600 }, /*4036A*/
+       {       0x1409, 0x7168, 0x1409, 0x4025, 0, 1, 921600 }, /*4025A*/
+       {       0x1409, 0x7168, 0x1409, 0x4027, 0, 1, 921600 }, /*4027A*/
+       {       0x1409, 0x7168, 0x1409, 0x4028, 0, 1, 921600 }, /*4028D*/
+       {       0x1409, 0x7168, 0x1409, 0x4036, 0, 2, 921600 }, /*4036D*/
+       {       0x1409, 0x7168, 0x1409, 0x4037, 0, 2, 921600 }, /*4037A*/
+       {       0x1409, 0x7168, 0x1409, 0x4038, 0, 2, 921600 }, /*4038D*/
+       {       0x1409, 0x7168, 0x1409, 0x4055, 0, 4, 921600 }, /*4055A*/
+       {       0x1409, 0x7168, 0x1409, 0x4056, 0, 4, 921600 }, /*4056A*/
+       {       0x1409, 0x7168, 0x1409, 0x4065, 0, 8, 921600 }, /*4065A*/
+       {       0x1409, 0x7168, 0x1409, 0x4066, 0, 8, 921600 }, /*4066A*/
+       {       0x1409, 0x7168, 0x1409, 0x4078, 0, 2, 921600 }, /*4078A*/
+       {       0x1409, 0x7168, 0x1409, 0x4079, 0, 2, 921600 }, /*4079H*/
+       {       0x1409, 0x7168, 0x1409, 0x4085, 0, 2, 921600 }, /*4085H*/
+       {       0x1409, 0x7168, 0x1409, 0x4088, 0, 2, 921600 }, /*4088A*/
+       {       0x1409, 0x7168, 0x1409, 0x4089, 0, 2, 921600 }, /*4089A*/
+       {       0x1409, 0x7168, 0x1409, 0x4095, 0, 4, 921600 }, /*4095A*/
+       {       0x1409, 0x7168, 0x1409, 0x4096, 0, 4, 921600 }, /*4096A*/
+       {       0x1409, 0x7168, 0x1409, 0x5025, 0, 1, 921600 }, /*4025D*/
+       {       0x1409, 0x7168, 0x1409, 0x5027, 0, 1, 921600 }, /*4027D*/
+       {       0x1409, 0x7168, 0x1409, 0x5037, 0, 2, 921600 }, /*4037D*/
+       {       0x1409, 0x7168, 0x1409, 0x5056, 0, 4, 921600 }, /*4056R*/
+       {       0x1409, 0x7168, 0x1409, 0x5065, 0, 8, 921600 }, /*4065R*/
+       {       0x1409, 0x7168, 0x1409, 0x5066, 0, 8, 921600 }, /*4066R*/
+       {       0x1409, 0x7168, 0x1409, 0x5078, 0, 2, 921600 }, /*4078U*/
+       {       0x1409, 0x7168, 0x1409, 0x5079, 0, 2, 921600 }, /*4079A*/
+       {       0x1409, 0x7168, 0x1409, 0x5085, 0, 2, 921600 }, /*4085U*/
+       {       0x1409, 0x7168, 0x1409, 0x6079, 0, 2, 921600 }, /*4079R*/
+       {       0x1409, 0x7168, 0x1409, 0x7079, 0, 2, 921600 }, /*4079S*/
+       {       0x1409, 0x7168, 0x1409, 0x8079, 0, 2, 921600 }, /*4079D*/
+       {       0x1409, 0x7168, 0x1409, 0x8137, 0, 2, 921600 }, /*8137*/
+       {       0x1409, 0x7168, 0x1409, 0x8138, 0, 2, 921600 }, /*8138*/
+       {       0x1409, 0x7168, 0x1409, 0x8156, 0, 4, 921600 }, /*8156*/
+       {       0x1409, 0x7168, 0x1409, 0x8157, 0, 4, 921600 }, /*8157*/
+       {       0x1409, 0x7168, 0x1409, 0x8166, 0, 8, 921600 }, /*8166*/
+       {       0x1409, 0x7168, 0x1409, 0x8237, 0, 2, 921600 }, /*8237*/
+       {       0x1409, 0x7168, 0x1409, 0x8238, 0, 2, 921600 }, /*8238*/
+       {       0x1409, 0x7168, 0x1409, 0x8256, 0, 4, 921600 }, /*8256*/
+       {       0x1409, 0x7168, 0x1409, 0x8257, 0, 4, 921600 }, /*8257*/
+       {       0x1409, 0x7168, 0x1409, 0x9056, 0, 4, 921600 }, /*9056A*/
+       {       0x1409, 0x7168, 0x1409, 0x9066, 0, 8, 921600 }, /*9066A*/
+       {       0x1409, 0x7168, 0x1409, 0x9079, 0, 2, 921600 }, /*4079E*/
+       {       0x1409, 0x7168, 0x1409, 0x9137, 0, 2, 921600 }, /*8137S*/
+       {       0x1409, 0x7168, 0x1409, 0x9138, 0, 2, 921600 }, /*8138S*/
+       {       0x1409, 0x7168, 0x1409, 0x9156, 0, 4, 921600 }, /*8156S*/
+       {       0x1409, 0x7168, 0x1409, 0x9157, 0, 4, 921600 }, /*8157S*/
+       {       0x1409, 0x7168, 0x1409, 0x9158, 0, 4, 921600 }, /*9158*/
+       {       0x1409, 0x7168, 0x1409, 0x9159, 0, 4, 921600 }, /*9159*/
+       {       0x1409, 0x7168, 0x1409, 0x9166, 0, 8, 921600 }, /*8166S*/
+       {       0x1409, 0x7168, 0x1409, 0x9167, 0, 8, 921600 }, /*9167*/
+       {       0x1409, 0x7168, 0x1409, 0x9168, 0, 8, 921600 }, /*9168*/
+       {       0x1409, 0x7168, 0x1409, 0x9237, 0, 2, 921600 }, /*8237S*/
+       {       0x1409, 0x7168, 0x1409, 0x9238, 0, 2, 921600 }, /*8238S*/
+       {       0x1409, 0x7168, 0x1409, 0x9256, 0, 4, 921600 }, /*8256S*/
+       {       0x1409, 0x7168, 0x1409, 0x9257, 0, 4, 921600 }, /*8257S*/
+       {       0x1409, 0x7168, 0x1409, 0xA056, 0, 4, 921600 }, /*9056B*/
+       {       0x1409, 0x7168, 0x1409, 0xA066, 0, 8, 921600 }, /*9066B*/
+       {       0x1409, 0x7168, 0x1409, 0xA079, 0, 2, 921600 }, /*4079F*/
+       {       0x1409, 0x7168, 0x1409, 0xA157, 0, 4, 921600 }, /*9157*/
+       {       0x1409, 0x7168, 0x1409, 0xA158, 0, 4, 921600 }, /*9158S*/
+       {       0x1409, 0x7168, 0x1409, 0xA159, 0, 4, 921600 }, /*9159S*/
+       {       0x1409, 0x7168, 0x1409, 0xA167, 0, 8, 921600 }, /*9167S*/
+       {       0x1409, 0x7168, 0x1409, 0xA168, 0, 8, 921600 }, /*9168S*/
+       {       0x1409, 0x7168, 0x1409, 0xB056, 0, 4, 921600 }, /*9056C*/
+       {       0x1409, 0x7168, 0x1409, 0xB079, 0, 2, 921600 }, /*9079A*/
+       {       0x1409, 0x7168, 0x1409, 0xB157, 0, 4, 921600 }, /*9157S*/
+       {       0x1409, 0x7168, 0x1409, 0xC079, 0, 2, 921600 }, /*9079B*/
+       {       0x1409, 0x7168, 0x1409, 0xD079, 0, 2, 921600 }, /*9079C*/
        {       PCI_VENDOR_ID_LAVA, PCI_DEVICE_ID_LAVA_DSERIAL,
                PCI_ANY_ID, PCI_ANY_ID,
                SPCI_FL_BASE0 | SPCI_FL_BASE_TABLE, 2, 115200 },

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