Hi there,
I send you the requested output from our SMP-Kernel. I am
building version 2.2.0-pre6 on a Pentium II 400MHz Double-Proc-Board.
For more information, please contact me. I will send it to you
as soon as possible.

Best regards, Roman Breuer


Linux version 2.2.0-pre6 ([EMAIL PROTECTED]) (gcc version
2.7.2.3) #7 SMP Wed Jan 13 07:18:51 CET 1999
Intel MultiProcessor Specification v1.4
    Virtual Wire compatibility mode.
OEM ID: SNID1031 Product ID: PRIMERGY     APIC at: 0xFEE00000
Processor #1 Pentium(tm) Pro APIC version 17
Processor #0 Pentium(tm) Pro APIC version 17
I/O APIC #2 Version 17 at 0xFEC00000.
Processors: 2
mapped APIC to ffffe000 (fee00000)
mapped IOAPIC to ffffd000 (fec00000)
Detected 396823291 Hz processor.
Console: colour VGA+ 80x25
Calibrating delay loop... 395.67 BogoMIPS
Memory: 516528k/524288k available (888k kernel code, 420k reserved,
6400k data, 52k init)
VFS: Diskquotas version dquot_6.4.0 initialized
Checking 386/387 coupling... OK, FPU using exception 16 error reporting.

Checking 'hlt' instruction... OK.
POSIX conformance testing by UNIFIX
mtrr: v1.26 (19981001) Richard Gooch ([EMAIL PROTECTED])
per-CPU timeslice cutoff: 100.20 usecs.
CPU1: Intel Pentium II (Deschutes) stepping 02
calibrating APIC timer ...
..... CPU clock speed is 396.8390 MHz.
..... APIC bus clock speed is 99.2094 MHz.
Booting processor 0 eip 2000
Calibrating delay loop... 396.49 BogoMIPS
OK.
CPU0: Intel Pentium II (Deschutes) stepping 02
Total of 2 processors activated (792.17 BogoMIPS).
enabling symmetric IO mode... ...done.
ENABLING IO-APIC IRQs
init IO_APIC IRQs
 IO-APIC pin 0, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29,
30, 31 not connected.
number of MP IRQ sources: 16.
number of IO-APIC registers: 32.
testing the IO APIC.......................
.... register #00: 02000000
.......    : physical APIC id: 02
.... register #01: 001F0011
.......     : max redirection entries: 001F
 WARNING: unexpected IO-APIC, please mail
          to [EMAIL PROTECTED]
.......     : IO APIC version: 0011
.... register #02: 00000000
.......     : arbitration: 00
.... IRQ redirection table:
 NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
 00 000 00  1    0    0   0   0    0    0    00
 01 000 00  0    0    0   0   0    1    1    59
 02 0FF 0F  0    0    0   0   0    1    1    51
 03 000 00  0    0    0   0   0    1    1    61
 04 000 00  0    0    0   0   0    1    1    69
 05 0FF 0F  1    1    0   0   0    1    1    71
 06 000 00  0    0    0   0   0    1    1    79
 07 000 00  0    0    0   0   0    1    1    81
 08 000 00  0    0    0   0   0    1    1    89
 09 0FF 0F  1    1    0   0   0    1    1    91
 0a 0FF 0F  1    1    0   0   0    1    1    99
 0b 0FF 0F  1    1    0   0   0    1    1    A1
 0c 000 00  0    0    0   0   0    1    1    A9
 0d 000 00  1    0    0   0   0    0    0    00
 0e 000 00  0    0    0   0   0    1    1    B1
 0f 0FF 0F  1    1    0   0   0    1    1    B9
 10 000 00  1    0    0   0   0    0    0    00
 11 000 00  1    0    0   0   0    0    0    00
 12 000 00  1    0    0   0   0    0    0    00
 13 000 00  1    0    0   0   0    0    0    00
 14 000 00  1    0    0   0   0    0    0    00
 15 000 00  1    0    0   0   0    0    0    00
 16 000 00  1    0    0   0   0    0    0    00
 17 000 00  1    0    0   0   0    0    0    00
 18 000 00  1    0    0   0   0    0    0    00
 19 000 00  1    0    0   0   0    0    0    00
 1a 000 00  1    0    0   0   0    0    0    00
 1b 000 00  1    0    0   0   0    0    0    00
 1c 000 00  1    0    0   0   0    0    0    00
 1d 000 00  1    0    0   0   0    0    0    00
 1e 000 00  1    0    0   0   0    0    0    00
 1f 000 00  1    0    0   0   0    0    0    00
IRQ to pin mappings:
IRQ0 -> 2
IRQ1 -> 1
IRQ3 -> 3
IRQ4 -> 4
IRQ5 -> 5
IRQ6 -> 6
IRQ7 -> 7
IRQ8 -> 8
IRQ9 -> 9
IRQ10 -> 10
IRQ11 -> 11
IRQ12 -> 12
IRQ13 -> 13
IRQ14 -> 14
IRQ15 -> 15
.................................... done.



--
-------------------------------------------------------------------------
                \_\_\_\_  \_  \_\_\_\_\_  \_   Rheinisch-
                \_   \_\_ \__ \_  \_  \_  \_   Westfaelische
                \_\_\_  \_\_\_\_  \_  \_\_\_   Technische
                \_  \_   \__ \__  \_  \_  \_   Hochschule
                \_   \_   \_  \_  \_  \_  \_   Aachen
                ============================================
                Workstation-Verbund            RECHENZENTRUM
-------------------------------------------------------------------------
Roman Breuer, Rechenzentrum RWTH Aachen
e-mail: [EMAIL PROTECTED]
-------------------------------------------------------------------------



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