On 20 Feb 1999, Sanna Lee wrote:
> > yes. IO-APIC allows to dispatch interrupts on both CPU. Without IO-APIC,
> > only cpu 0 takes interrupts ==> I/O slow down.
>
> Hmmm, that's very interesting. Do you think this slowdown justifies adding the
> IO-APIC? It increases the price of the motherboard by 30%, unfortunately. :-(
it pretty much looks like a desktop motherboard, and as such the interrupt
penalty is not really noticeable. The IOAPIC does quite intelligently
distribute interrupts.
> > Try an old SMP kernel without IO-APIC (I would say a 2.0.x, maybe
> > 2.0.36).
>
> Oh, we wanted so much to use kernel 2.2.1. :-(
no, you'll have a 2.2 kernel with 2.0-level interrupts, but the rest of
the system will happily run 2.2.
you could also send some of the interrupts to the other CPU (sort of poor
man's IO-APIC emulation), but this adds 5-10 usecs penalty to every
interrupt received on the second CPU, and increased APIC bus traffic.
-- mingo
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