this is the latest version of the x86 SMP/APIC/IOAPIC code:

        http://www.redhat.com/~mingo/smp-2.3.18-B1

(patch too big to be posted to vger)

This is a major cleanup/rewrite of various components within the APIC and
lowlevel SMP/irq code. This patch might fix some 'notoriously' flaky SMP
boards, and has the potential to break working ones ;) Anyway, i'd like to
ask all adventureous x86 SMP board owners to test out this patch - and
please watch for new weirdnesses, or old, still unfixed weirdnesses. [i'd
like to hear about all problems that are still not fixed by this patch]

Bugs that should be/might be fixed by this patch:

        - 'timer irq doesnt work' type of messages should not happen
          anymore.

        - 'spurious APIC interrupt' messages and related lockups should
          not happen anymore.

        - flakyness under 'noapic' mode should be fixed.

        - IRQ load unevenness between CPUs should not occur anymore.

        - IRQ-load related lockups should not happen, or should be
          converted to oopses by the NMI-watchdog.

the patch itself works on P5, PII/PIII, UP boxes in various scenarios. It
applies cleanly to all later 2.3 kernels (2.3.17/18, 2.3.18-ac1-6).
(Alan, please dont apply this patch yet, i'd first like to get some
feedback on it.)

the Changelog:

        - unconditional NMI oopser. It turned out that we can do this on
        99% (maybe 100%) of x86 SMP boxes without impacting timer IRQ
        performance. See Documentation/nmi_watchdog.txt.
        (me)

        - old external IOAPICs and 486-based SMP boxes should work now
        (Maciej W. Rozycki)

        - unused variable space cleanups, initialize_secondary() cleanup
        (Manfred Spraul)

        - moved all IO-APIC and IPI APIC messages to logical destination
        mode, fixed LDR initialization bug, cleaned up irq-vector space.
        (me)

        - 'timer-sync' feature, all CPUs synchronize their time stamp
        counters, errors get reported and fixed. This fixes certain
        dual-PIII boards.
        (me)

        - the 'set the destination CPU mask to 0' IOAPIC-edge trick is
        actually not valid and triggers APIC bugs. Exchanged it for an
        equivalent but safe method.
        (me)

        - 8259A init moved out of setup.S
        (Maciej W. Rozycki)

        - spurious 8259A interrupts get reported properly, APIC error
        vector exported and logged properly
        (me)

        - a 'noapic' bug fixed - fixes instability in noapic mode.
        (me)

        - we can inline ack_APIC() on P6 boxes: smaller and faster IRQ 
        code.
        (me)

        - other stuff.

reports, comments, suggestions welcome.

-- mingo

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