Take a look at the relative interrupt handling below.  This is taken
from kernel v2.2.16 running on a dual Pentium2/450 (CPU stepping 2)
system.

# cat /proc/interrupts
           CPU0       CPU1
  0:    1984627    5267692    IO-APIC-edge  timer
  1:          0          2    IO-APIC-edge  keyboard
  2:          0          0          XT-PIC  cascade
  5:      17424      32802    IO-APIC-edge  eth1
  8:          0          3    IO-APIC-edge  rtc
 13:          1          0          XT-PIC  fpu
 14:       9814      18808    IO-APIC-edge  ide0
 15:       4000       5248    IO-APIC-edge  ide1
 17:      22594      26027   IO-APIC-level  eth0
NMI:          0
ERR:          0

I'm a little concerned about the obvious bias in favor of having a
given interrupt handled by CPU1.  My previous experience (slighly
earlier kernels on a different machine) has been that the interrupt
load is roughly equal on both CPUs.

Is my concern misplaced?


Here's a little more to go on:

# cat /proc/cpuinfo
processor       : 0
vendor_id       : GenuineIntel
cpu family      : 6
model           : 5
model name      : Pentium II (Deschutes)
stepping        : 2
cpu MHz         : 448.805
cache size      : 512 KB
fdiv_bug        : no
hlt_bug         : no
sep_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 mmx fxsr
bogomips        : 894.57

processor       : 1
vendor_id       : GenuineIntel
cpu family      : 6
model           : 5
model name      : Pentium II (Deschutes)
stepping        : 2
cpu MHz         : 448.805
cache size      : 512 KB
fdiv_bug        : no
hlt_bug         : no
sep_bug         : no
f00f_bug        : no
coma_bug        : no
fpu             : yes
fpu_exception   : yes
cpuid level     : 2
wp              : yes
flags           : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge
mca cmov pat pse36 mmx fxsr
bogomips        : 894.57

And still more info:

kernel: Linux version 2.2.16 ([EMAIL PROTECTED]) (gcc version
egcs-2.91.66 19990314/Linux (egcs-1.1.2 release)) #1 SMP Sat Jun 10
00:56:48 EST 2000
kernel: Intel MultiProcessor Specification v1.1
kernel:     Virtual Wire compatibility mode.
kernel: OEM ID: OEM00000 Product ID: PROD00000000 APIC at: 0xFEE00000
kernel: Processor #0 Pentium(tm) Pro APIC version 17
kernel: Processor #1 Pentium(tm) Pro APIC version 17
kernel: I/O APIC #2 Version 17 at 0xFEC00000.
kernel: Processors: 2
kernel: mapped APIC to ffffe000 (fee00000)
kernel: mapped IOAPIC to ffffd000 (fec00000)
kernel: Detected 448810 kHz processor.
kernel: Console: colour VGA+ 80x25
kernel: Calibrating delay loop... 894.57 BogoMIPS
kernel: Memory: 257944k/262080k available (828k kernel code, 420k
reserved, 2820k data, 68k init)
kernel: Dentry hash table entries: 32768 (order 6, 256k)
kernel: Buffer cache hash table entries: 262144 (order 8, 1024k)
kernel: Page cache hash table entries: 65536 (order 6, 256k)
kernel: Checking 386/387 coupling... OK, FPU using exception 16 error
reporting.
kernel: Checking 'hlt' instruction... OK.
kernel: POSIX conformance testing by UNIFIX
kernel: mtrr: v1.35a (19990819) Richard Gooch ([EMAIL PROTECTED])
kernel: per-CPU timeslice cutoff: 100.11 usecs.
kernel: CPU0: Intel Pentium II (Deschutes) stepping 02
kernel: calibrating APIC timer ...
kernel: ..... CPU clock speed is 448.8159 MHz.
kernel: ..... system bus clock speed is 99.7366 MHz.
kernel: Booting processor 1 eip 2000
kernel: Calibrating delay loop... 894.57 BogoMIPS
kernel: OK.
kernel: CPU1: Intel Pentium II (Deschutes) stepping 02
kernel: Total of 2 processors activated (1789.13 BogoMIPS).
kernel: enabling symmetric IO mode... ...done.
kernel: ENABLING IO-APIC IRQs
kernel: init IO_APIC IRQs
kernel:  IO-APIC (apicid-pin) 2-0, 2-18, 2-19, 2-20, 2-21, 2-22, 2-23
not connected.
kernel: number of MP IRQ sources: 21.
kernel: number of IO-APIC #2 registers: 24.
kernel: testing the IO APIC.......................
kernel:
kernel: IO APIC #2......
kernel: .... register #00: 02000000
kernel: .......    : physical APIC id: 02
kernel: .... register #01: 00170011
kernel: .......     : max redirection entries: 0017
kernel: .......     : IO APIC version: 0011
kernel: .... register #02: 00000000
kernel: .......     : arbitration: 00
kernel: .... IRQ redirection table:
kernel:  NR Log Phy Mask Trig IRR Pol Stat Dest Deli Vect:
kernel:  00 000 00  1    0    0   0   0    0    0    00
kernel:  01 000 00  0    0    0   0   0    1    1    59
kernel:  02 0FF 0F  0    0    0   0   0    1    1    51
kernel:  03 000 00  0    0    0   0   0    1    1    61
kernel:  04 000 00  0    0    0   0   0    1    1    69
kernel:  05 000 00  0    0    0   0   0    1    1    71
kernel:  06 000 00  0    0    0   0   0    1    1    79
kernel:  07 000 00  0    0    0   0   0    1    1    81
kernel:  08 000 00  0    0    0   0   0    1    1    89
kernel:  09 000 00  0    0    0   0   0    1    1    91
kernel:  0a 000 00  0    0    0   0   0    1    1    99
kernel:  0b 000 00  0    0    0   0   0    1    1    A1
kernel:  0c 000 00  0    0    0   0   0    1    1    A9
kernel:  0d 000 00  1    0    0   0   0    0    0    00
kernel:  0e 000 00  0    0    0   0   0    1    1    B1
kernel:  0f 000 00  0    0    0   0   0    1    1    B9
kernel:  10 0FF 0F  1    1    0   1   0    1    1    C1
kernel:  11 0FF 0F  1    1    0   1   0    1    1    C9
kernel:  12 000 00  1    0    0   0   0    0    0    00
kernel:  13 000 00  1    0    0   0   0    0    0    00
kernel:  14 000 00  1    0    0   0   0    0    0    00
kernel:  15 000 00  1    0    0   0   0    0    0    00
kernel:  16 000 00  1    0    0   0   0    0    0    00
kernel:  17 000 00  1    0    0   0   0    0    0    00
kernel: .................................... done.
kernel: checking TSC synchronization across CPUs: passed.

Thank you.


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