From: Alexandru Gagniuc <ale...@adaptrum.com> Date: Fri, 28 Jul 2017 15:07:03 -0700
> Before the GMAC on the Anarion chip can be used, the PHY interface > selection must be configured with the DWMAC block in reset. > > This layer covers a block containing only two registers. Although it > is possible to model this as a reset controller and use the "resets" > property of stmmac, it's much more intuitive to include this in the > glue layer instead. > > At this time only RGMII is supported, because it is the only mode > which has been validated hardware-wise. > > Signed-off-by: Alexandru Gagniuc <ale...@adaptrum.com> I don't see how this fits into any patch series at all. If this is part of a series you posted elsewhere, you should keep netdev@ on all such postings so people there can review the change in-context. Thanks. _______________________________________________ linux-snps-arc mailing list linux-snps-arc@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-snps-arc
