Hi Vineet,
>From: Vineet Gupta <vgu...@synopsys.com>
>Sent: Tuesday, January 7, 2020 21:25
>To: Eugeniy Paltsev; linux-snps-arc@lists.infradead.org
>Cc: linux-ker...@vger.kernel.org; Alexey Brodkin
>Subject: Re: [PATCH 4/5] ARC: add support for DSP-enabled userspace
>applications
>> +/*
>> + * As we save new and restore old AUX register value in the same place we
>> + * can optimize a bit and use AEX instruction (swap contents of an auxiliary
>> + * register with a core register) instead of LR + SR pair.
>> + */
>> +#define AUX_SAVE_RESTORE(_saveto, _readfrom, _offt, _aux, _scratch) \
>> +do { \
>> + __asm__ __volatile__( \
>> + "ld %0, [%2, %4] \n" \
>> + "aex %0, [%3] \n" \
>> + "st %0, [%1, %4] \n" \
>> + : \
>> + "=&r" (_scratch) /* must be early clobber */ \
>> + : \
>> + "r" (_saveto), \
>> + "r" (_readfrom), \
>> + "I" (_aux), \
>> + "I" (_offt) \
>> + : \
>
>AEX with "I" constraint will likely be an 8 byte instructions always. Best to
>give
>compiler wiggle room with "Ir"
Could you please explain how "Ir" will work in this case?
Does this mean that compiler can pass the value either as constant ('I') or
via register ('r')?
Note that in this case both _aux and _offt are compile-time constants -
_aux comes from define and _offt comes from offsetof().
>> + "memory" \
>> + ); \
>> +} while (0)
>> +
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