On Wed, Mar 12, 2014 at 16:20 +0100, Michael Grzeschik wrote:
> 
> The bitbang spi driver currently only supports the MSB mode. This patch
> adds the possibility to clock the data in LSB mode.
> 
> Signed-off-by: Michael Grzeschik <[email protected]>
> ---
>  drivers/spi/spi-bitbang-txrx.h | 98 
> +++++++++++++++++++++++++++++-------------
>  drivers/spi/spi-bitbang.c      |  3 +-
>  2 files changed, 71 insertions(+), 30 deletions(-)
> 
> diff --git a/drivers/spi/spi-bitbang-txrx.h b/drivers/spi/spi-bitbang-txrx.h
> index b6e348d..7f9c020 100644
> --- a/drivers/spi/spi-bitbang-txrx.h
> +++ b/drivers/spi/spi-bitbang-txrx.h
> @@ -49,22 +49,42 @@ bitbang_txrx_be_cpha0(struct spi_device *spi,
>  {
>       /* if (cpol == 0) this is SPI_MODE_0; else this is SPI_MODE_2 */
>  
> -     /* clock starts at inactive polarity */
> -     for (word <<= (32 - bits); likely(bits); bits--) {
> -
> -             /* setup MSB (to slave) on trailing edge */
> -             if ((flags & SPI_MASTER_NO_TX) == 0)
> -                     setmosi(spi, word & (1 << 31));
> -             spidelay(nsecs);        /* T(setup) */
> -
> -             setsck(spi, !cpol);
> -             spidelay(nsecs);
> -
> -             /* sample MSB (from slave) on leading edge */
> -             if ((flags & SPI_MASTER_NO_RX) == 0)
> -                     word |= getmiso(spi);
> -             setsck(spi, cpol);
> -             word <<= 1;
> +     if (spi->mode & SPI_LSB_FIRST) {
> +             /* clock starts at inactive polarity */
> +             for (; likely(bits); bits--) {
> +
> +                     /* setup MSB (to slave) on trailing edge */
> +                     if ((flags & SPI_MASTER_NO_TX) == 0)
> +                             setmosi(spi, word & 1);
> +                     spidelay(nsecs);        /* T(setup) */
> +
> +                     setsck(spi, !cpol);
> +                     spidelay(nsecs);
> +
> +                     /* sample LSB (from slave) on leading edge */
> +                     if ((flags & SPI_MASTER_NO_RX) == 0)
> +                             word |= getmiso(spi);
> +                     setsck(spi, cpol);
> +                     word >>= 1;
> +             }
> +     } else {
> +             /* clock starts at inactive polarity */
> +             for (word <<= (32 - bits); likely(bits); bits--) {
> +
> +                     /* setup MSB (to slave) on trailing edge */
> +                     if ((flags & SPI_MASTER_NO_TX) == 0)
> +                             setmosi(spi, word & (1 << 31));
> +                     spidelay(nsecs);        /* T(setup) */
> +
> +                     setsck(spi, !cpol);
> +                     spidelay(nsecs);
> +
> +                     /* sample MSB (from slave) on leading edge */
> +                     if ((flags & SPI_MASTER_NO_RX) == 0)
> +                             word |= getmiso(spi);
> +                     setsck(spi, cpol);
> +                     word <<= 1;
> +             }
>       }
>       return word;
>  }

Would it be useful to not duplicate the transmission logic, but
instead to optionally "bit swap" the TX and RX data before and
after the common transmission logic?  Just a though whether this
might help maintenance.  There might even be existing and proven
code to bit swap integers?


virtually yours
Gerhard Sittig
-- 
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