Hi Geert-san,
> Hi Shimoda-san,
>
> On Tue, Jan 6, 2015 at 11:01 AM, Yoshihiro Shimoda
> <[email protected]> wrote:
> > Since the FLD bit field is bit[3:2], the MDR1_FLD_MASK value should
> > be 0x0000000c.
>
> This patch doesn't apply, since Mark has applied your other patch
> "spi: sh-msiof: Configure MSIOF sync signal timing in device tree".
>
> Please rebase on top of spi/for-next (or
> renesas-drivers-2015-01-06-v3.19-rc3).
Oops. Thank you for the point.
I used spi/for-linux branch. So, I will rebase on top of spi/for-next.
Best regards,
Yoshihiro Shimoda
> Thanks!
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 --
> [email protected]
>
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> when I'm talking to journalists I just say "programmer" or something like
> that.
> -- Linus Torvalds
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