It seems that the intention was to index the dqs_dly array with dqs_i and not
clk_i. Using clk_i means that dqs_i is unused in the loop and also causes us to
run off the end of the dqs_dly array resulting in:
In file included from dram.c:34:0:
dram.c: In function ‘dramc_init’:
dram.c:314:15: warning: iteration 7u invokes undefined behavior
[-Waggressive-loop-optimizations]
(dqs_dly[clk_i] & 0x4f) << 14);
(clk_i runs to <15, dqs_i to <7 and dqs_dly[] has 8 entries)
I have not run this on actual hardware. I'm not sure when it is even used
because it is gated on "para->tpr3 & (0x1 << 31)" and AFAICT all
board/sunxi/dram_* files currently in the tree set trp3 to zero.
Signed-off-by: Ian Campbell <[email protected]>
---
arch/arm/cpu/armv7/sunxi/dram.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv7/sunxi/dram.c b/arch/arm/cpu/armv7/sunxi/dram.c
index 94a3657..4d570a0 100644
--- a/arch/arm/cpu/armv7/sunxi/dram.c
+++ b/arch/arm/cpu/armv7/sunxi/dram.c
@@ -311,7 +311,7 @@ static int dramc_scan_dll_para(void)
for (cr_i = 1; cr_i < 5; cr_i++) {
clrsetbits_le32(&dram->dllcr[cr_i],
0x4f << 14,
- (dqs_dly[clk_i] & 0x4f) << 14);
+ (dqs_dly[dqs_i] & 0x4f) << 14);
}
udelay(2);
if (dramc_scan_readpipe() == 0)
--
1.8.5.3
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