Hello, the following part of linux-sunxi is odd and probably doesn't do what was intended:
arch/arm/plat-sunxi/core.c:287 writel((1 << SW_INT_IRQNO_ENMI), SW_INT_IRQ_PENDING_REG0); You find arch/arm/plat-sunxi/include/plat/irqs.h:#define SW_INT_IRQNO_ENMI (0 + SW_INT_START) Sometimes arch/arm/plat-sunxi/include/plat/irqs.h:#define SW_INT_START AW_IRQ_GIC_START Sometimes arch/arm/plat-sunxi/include/plat/irqs.h:#define SW_INT_START 0 And #ifdef CONFIG_ARCH_SUN7I #define AW_IRQ_GIC_START 32 // <------------------ look here #define SW_INT_START AW_IRQ_GIC_START #define NR_IRQS (AW_IRQ_GIC_START + 128 + 32) #define MAX_GIC_NR 1 #else #define SW_INT_START 0 #define NR_IRQS (96+32) #endif For A20, CONFIG_ARCH_SUN7I is defined. Therefore, (1 << SW_INT_IRQNO_ENMI) will expand to (1 << 32) which is useless on a 32 bit ARM, 1 being a 32 bit int. Even on other 32 bit platforms, best you could hope for is (1 << 32) == 0, not that useful. There are two possibilities what was meant: 1) 32 is a typo and it should have been 31 or whatever 2) It's really bigger than 32 bits and the mask should have been (1L << 32) Which is it? Where is writel (the used one) declared? Cheers, Danny -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/groups/opt_out.
