Thanks Runzhong for the suggestions.

We need 16bit wide SRAM interface so NAND flash port doesn't suit us.
We plan to build SRAM on top of GPIO system. 
The interface is going to be used sporadically for a fraction of second, 
so I guess we will be able to take the CPU fully (no DMA) while it is 
active.    

Anyone implemented similar thing with AW?

Thanks
Dimitar



11 март 2014, вторник, 03:05:45 UTC+2, Runzhong Yi написа:
>
> It depends on your needs. If simply want to expand some DI/DO, ADC/DAC 
> or some other peripheral, USB maybe a good, cheap and expandible 
> option. I don't see too much needs in SRAM interface. If you 
> desperately need a parellel interface, you can use nand flash 
> controller with a small CPLD. 
>
> 2014-03-05 17:51 GMT+08:00 Dimitar Penev <dpe...@gmail.com <javascript:>>: 
>
> > Thanks Runzhong, 
> > 
> > It is as a big limitation of the AW SoC, isn't it? 
> > Dimitar 
> > 
> > 
> > 
> > 04 март 2014, вторник, 12:00:58 UTC+2, Runzhong Yi написа: 
> >> 
> >> For A10 or A13, the answer is absolutely NO! I didn't checked the 
> >> datasheet for A20, but I think it's the same. 
> >> 
> >> 2014-03-03 21:24 GMT+08:00  <dpe...@gmail.com>: 
> >> > Hi All, 
> >> > 
> >> > I am wondering if Allwinner A10/A13/A20 SoC can support external 
> >> > asynchronous memory. (8/16 bit Data bus, Address bus, \RD, \WR, \CS) 
> >> > I don't see information about this in the A20 datasheet. 
> >> > 
> >> > Is there some software component in sunxi Linux about this? 
> >> > 
> >> > Pointers are very welcome. 
> >> > 
> >> > Thanks 
> >> > Dimitar 
> >> > 
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