Bo Shen reported that MMC no longer worked after commit ff42704 "sunxi: use clrsetbit in gpio/pinmux code".
Re-examining those changes shows a couple of bogus changes (forgetting to shift the value in one, and using the offset instead of the value in another). Presumably Bo Shen's platform uses a different MMC device to what I tested. Signed-off-by: Ian Campbell <[email protected]> Cc: Hans de Goede <[email protected]> --- arch/arm/cpu/armv7/sunxi/pinmux.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/arch/arm/cpu/armv7/sunxi/pinmux.c b/arch/arm/cpu/armv7/sunxi/pinmux.c index 3fdd337..1f2843f 100644 --- a/arch/arm/cpu/armv7/sunxi/pinmux.c +++ b/arch/arm/cpu/armv7/sunxi/pinmux.c @@ -43,7 +43,7 @@ int sunxi_gpio_set_drv(u32 pin, u32 val) u32 offset = GPIO_DRV_OFFSET(pin); struct sunxi_gpio *pio = BANK_TO_GPIO(bank); - clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val); + clrsetbits_le32(&pio->drv[0] + index, 0x3 << offset, val << offset); return 0; } @@ -55,7 +55,7 @@ int sunxi_gpio_set_pull(u32 pin, u32 val) u32 offset = GPIO_PULL_OFFSET(pin); struct sunxi_gpio *pio = BANK_TO_GPIO(bank); - clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, offset); + clrsetbits_le32(&pio->pull[0] + index, 0x3 << offset, val << offset); return 0; } -- 1.9.0 -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
