On Thursday, May 01, 2014 at 08:40:44 PM, Ian Campbell wrote:
> This patch adds the basic clocks and timer support for the Allwinner A20
> (sun7i) processor. This code will not been compiled until the build is
> hooked up in a later patch. It has been split out to keep the patches
> manageable.
>
> Some of the code here is common to multiple sunxi subarchtectures, hence
> files are named sun4i which is the earliest similar variant.
>
> Signed-off-by: Alexandru Gagniuc <[email protected]>
> Signed-off-by: Chen-Yu Tsai <[email protected]>
> Signed-off-by: Emilio López <[email protected]>
> Signed-off-by: Hans de Goede <[email protected]>
> Signed-off-by: Henrik Nordstrom <[email protected]>
> Signed-off-by: Jens Kuske <[email protected]>
> Signed-off-by: Luke Leighton <[email protected]>
> Signed-off-by: Oliver Schinagl <[email protected]>
> Signed-off-by: Ian Campbell <[email protected]>
> Cc: Stefan Roese <[email protected]>
> Cc: Tom Cubie <[email protected]>
> ---
> v4: "Based on d9fe0a1e061e "sunxi: mksunxiboot: remove unnecessary casts."
I have no idea what this changelog entry tells me, I will have to review this
entire patch anew.
[...]
> +void clock_set_pll1(int hz)
> +{
> + int i = 0;
> + int axi, ahb, apb0;
> + struct sunxi_ccm_reg * const ccm =
> + (struct sunxi_ccm_reg *)SUNXI_CCM_BASE;
> +
> + /* Find target frequency */
> + while (pll1_para[i].freq < hz)
> + i++;
You can just do a for (...) cycle here, instead of the unbounded while cycle.
Also, I think hz will always be positive, thus int hz -> unsigned int hz .
[...]
Best regards,
Marek Vasut
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