On Mon, Jun 23, 2014 at 9:23 PM, Chen-Yu Tsai <[email protected]> wrote:
> On Mon, Jun 23, 2014 at 12:48 AM, [email protected] <[email protected]>
> wrote:
>> On Sun, Jun 22, 2014 at 12:36 PM, Chen-Yu Tsai <[email protected]> wrote:
>>> On Sun, Jun 22, 2014 at 11:48 PM, [email protected] <[email protected]>
>>> wrote:
>>>> Why is the channel for TX one less than RX? In the manual both of the
>>>> DRQs are 27.
>>>
>>> If you looked at the bindings in the patch, you would see that
>>>
>>> <&dma 1 xx>
>>>
>>> specifies dedicated DMA, which indeed has separate channels for TX and RX.
>>>
>>
>> I think I see my mistake. I am trying to put in NDMA numbers when it
>> wants DDMA ones. When the first field is 1, it is dedicated DDMA.
>>
>> So for my audio codec I want this? When the first field is zero, then
>> second field is NDMA?
>>
>> codec: codec@1c22c00 {
>
> Add the leading zeros so the format's the same as the other nodes.
>
>> #sound-dai-cells = <0>;
>> compatible = "allwinner,sun7i-a20-codec";
>> reg = <0x01C22c00 0x40>;
>> interrupts = <0 30 4>;
>> clocks = <&pll2>, <&apb0_gates 0>, <&codec_clk>;
>> clock-names = "pll2", "apb", "codec";
>> dmas = <&dma 0 19>, <&dma 0 19>;
>> dma-names = "rx", "tx";
>> };
>
> That's correct.
>
> May I ask how you plan on tying the platform and machine drivers?
> "simple-audio-card"?
I'm using simple-audio-card.
Does this look good for a cyclic DMA function? I am starting to test
everything now. It still doesn't make noise yet.
static struct dma_async_tx_descriptor *sun4i_dma_prep_dma_cyclic(
struct dma_chan *chan, dma_addr_t buf, size_t len,
size_t period_len, enum dma_transfer_direction dir,
unsigned long flags, void *context) {
struct sun4i_dma_vchan *vchan = to_sun4i_dma_vchan(chan);
struct dma_slave_config *sconfig = &vchan->cfg;
struct sun4i_ddma_promise *promise;
struct sun4i_ddma_contract *contract;
dma_addr_t src, dest;
if (!is_slave_direction(dir)) {
dev_err(chan2dev(chan), "Invalid DMA direction\n");
return NULL;
}
contract = generate_ddma_contract();
if (!contract)
return NULL;
/* Figure out addresses */
if (dir == DMA_MEM_TO_DEV) {
src = buf;
dest = sconfig->dst_addr;
} else {
src = sconfig->src_addr;
dest = buf;
}
if (vchan->is_dedicated)
promise = generate_ddma_promise(chan, src, dest, len, sconfig);
else
promise = generate_ndma_promise(chan, src, dest, len, sconfig);
if (!promise) {
kfree(contract);
return NULL;
}
/* Figure out endpoints */
if (vchan->is_dedicated && dir == DMA_MEM_TO_DEV) {
promise->cfg |= DDMA_CFG_CONT_MODE |
DDMA_CFG_SRC_DRQ_TYPE(DDMA_DRQ_TYPE_SDRAM) |
DDMA_CFG_SRC_ADDR_MODE(DDMA_ADDR_MODE_LINEAR) |
DDMA_CFG_DEST_DRQ_TYPE(vchan->endpoint) |
DDMA_CFG_DEST_ADDR_MODE(DDMA_ADDR_MODE_IO);
} else if (!vchan->is_dedicated && dir == DMA_MEM_TO_DEV) {
promise->cfg |= NDMA_CFG_CONT_MODE |
NDMA_CFG_SRC_DRQ_TYPE(NDMA_DRQ_TYPE_SDRAM) |
NDMA_CFG_DEST_DRQ_TYPE(vchan->endpoint) |
NDMA_CFG_DEST_FIXED_ADDR;
} else if (vchan->is_dedicated) {
promise->cfg |= DDMA_CFG_CONT_MODE | DDMA_CFG_SRC_DRQ_TYPE(vchan->endpoint) |
DDMA_CFG_SRC_ADDR_MODE(DDMA_ADDR_MODE_IO) |
DDMA_CFG_DEST_DRQ_TYPE(DDMA_DRQ_TYPE_SDRAM) |
DDMA_CFG_DEST_ADDR_MODE(DDMA_ADDR_MODE_LINEAR);
} else {
promise->cfg |= NDMA_CFG_CONT_MODE | NDMA_CFG_SRC_DRQ_TYPE(vchan->endpoint) |
NDMA_CFG_SRC_FIXED_ADDR |
NDMA_CFG_DEST_DRQ_TYPE(NDMA_DRQ_TYPE_SDRAM);
}
/* Fill the contract with our only promise */
list_add_tail(&promise->list, &contract->demands);
/* And add it to the vchan */
return vchan_tx_prep(&vchan->vc, &contract->vd, flags);
}
>
>
> ChenYu
--
Jon Smirl
[email protected]
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