Hi, On Fri, Sep 19, 2014 at 09:19:01AM -0700, RFat wrote: > I wonder is anyone managed to get the L and M GPIO pins working on the A31 > or A80.
I don't know about the A80 yet, but we managed to get it working on the A31 in mainline. > Apparently, they belong to a different module called RPIO (instead > of PIO which is responsible for A, B, C.. banks). Indeed. > I know that there is an APB gate that must be turned on for the PIO > module. Is there something equivalent for the RPIO? Yes, in the APB0 clock module, which is part of the PRCM block. And unlike PIO, there's a reset line, controlled again by the PRCM, that need to be deasserted before using R_PIO. https://github.com/amery/linux-sunxi/blob/import/lichee-a31-3.3/arch/arm/mach-sun6i/include/mach/ccmu.h#L748 Maxime -- Maxime Ripard, Free Electrons Embedded Linux, Kernel and Android engineering http://free-electrons.com
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