Hi, On Wed, 26 Nov 2014 22:13:18 +0100 Maxime Ripard <[email protected]> wrote:
[...] > > I remember someone (Chen-Yu? Boris?) saying that the 1wire clock was > not really a mod0 clk. From what I could gather from the source code, > it seems to have a wider m divider, so we could argue that it should > need a new compatible. Wasn't me :-). Regarding the rest of the discussion I miss some context, but here's what I remember decided us to choose the MFD approach for the PRCM block: 1) it's embedding several unrelated functional blocks (reset, clk, and some other things I don't remember). 2) none of the functionalities provided by the PRCM were required in the early boot stage 3) We wanted to represent the HW blocks as they are really described in the memory mapping instead of splitting small register chunks over the DT. Can someone sum-up the current issue you're trying to solve ? IMHO, if you really want to split those functionalities over the DT (some nodes under clks and other under reset controller), then I suggest to use.............. (Maxime, please stop smiling :P) .............. SYSCON Best Regards, Boris -- Boris Brezillon, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
