---
arch/arm/cpu/armv7/sunxi/board.c | 4 ++++
common/spl/spl_nand.c | 23 +++++++++++++++++++++--
include/configs/sunxi-common.h | 23 ++++++++++++++---------
3 files changed, 39 insertions(+), 11 deletions(-)
diff --git a/arch/arm/cpu/armv7/sunxi/board.c b/arch/arm/cpu/armv7/sunxi/board.c
index ac94a1f..860007f 100644
--- a/arch/arm/cpu/armv7/sunxi/board.c
+++ b/arch/arm/cpu/armv7/sunxi/board.c
@@ -37,7 +37,11 @@ DECLARE_GLOBAL_DATA_PTR;
*/
u32 spl_boot_device(void)
{
+#ifdef CONFIG_SPL_ON_NAND
+ return BOOT_DEVICE_NAND;
+#else
return BOOT_DEVICE_MMC1;
+#endif
}
/* No confirmation data available in SPL yet. Hardcode bootmode */
diff --git a/common/spl/spl_nand.c b/common/spl/spl_nand.c
index 9da0218..d8a5668 100644
--- a/common/spl/spl_nand.c
+++ b/common/spl/spl_nand.c
@@ -78,7 +78,26 @@ void spl_nand_load_image(void)
nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
spl_parse_image_header(header);
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- spl_image.size, (void *)spl_image.load_addr);
+ if (header->ih_os == IH_OS_U_BOOT) {
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ spl_image.size, (void
*)spl_image.load_addr);
+ nand_deselect();
+ return;
+ }
+ puts("U-boot header didn't match.\n");
+#ifdef CONFIG_SYS_NAND_U_BOOT_BACKUP_OFFS
+ puts("Trying to start backup u-boot now...\n");
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_BACKUP_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ if (header->ih_os == IH_OS_U_BOOT) {
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_BACKUP_OFFS,
+ spl_image.size, (void
*)spl_image.load_addr);
+ nand_deselect();
+ return;
+ }
+#endif
+ puts("No valid u-boot image found.\n");
nand_deselect();
+ hang();
}
diff --git a/include/configs/sunxi-common.h b/include/configs/sunxi-common.h
index 019a1bb..c017909 100644
--- a/include/configs/sunxi-common.h
+++ b/include/configs/sunxi-common.h
@@ -63,14 +63,20 @@
#else
#define PHYS_SDRAM_0_SIZE 0x40000000 /* 1 GiB */
#endif
-#if 0
+
/* Nand config */
#define CONFIG_NAND
#define CONFIG_NAND_SUNXI
-#define CONFIG_CMD_NAND /* NAND support */
-#define CONFIG_SYS_MAX_NAND_DEVICE 1
-#define CONFIG_SYS_NAND_BASE 0x00
-#endif
+
+#define CONFIG_SPL_NAND_DRIVERS
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_CMD_SPL_WRITE_SIZE 0x000400 /* 1024 byte */
+#define CONFIG_CMD_SPL_NAND_OFS 0x400000 /* multiimage */
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x008000
+#define CONFIG_SYS_NAND_U_BOOT_BACKUP_OFFS 0x208000
+#define CONFIG_SYS_NAND_PAGE_SIZE 0x002000 /* 8kb*/
+/* ~ Nand config */
#define CONFIG_CMD_MEMORY
#define CONFIG_CMD_SETEXPR
@@ -259,10 +265,6 @@
* large SPL for A10/A20 with this on. sun5i however accepts a much larger
* SPL
*/
-#if defined( CONFIG_SUN5I ) || defined ( CONFIG_SYS_THUMB_BUILD )
-#define CONFIG_SPL_OS_BOOT
-#endif
-
#ifdef CONFIG_SPL_FEL
#define CONFIG_SPL
@@ -284,7 +286,10 @@
#endif
#define CONFIG_SPL_LIBDISK_SUPPORT
+
+#if !defined CONFIG_SPL_ON_NAND
#define CONFIG_SPL_MMC_SUPPORT
+#endif /* CONFIG_SPL_ON_NAND */
#define CONFIG_SPL_LDSCRIPT "arch/arm/cpu/armv7/sunxi/u-boot-spl.lds"
--
2.2.1
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