Am Dienstag, 2. Juni 2015 13:44:31 UTC+2 schrieb [email protected]: > Hello, > > since modifying/setting CONFIG_GMAC_TX_DELAY in u-boot seems to be necessary > to get GMAC work reliable on some boards I wonder whether GMAC_RX_DELAY isn't > worth a look (with many A20 based boards we've here we experience big > differences in TX and RX throughput). > > The background is outlined here: > http://lists.denx.de/pipermail/u-boot/2014-September/190239.html > > RX delay seems to be related to bits 5-7 of the GMAC clk register, TX delay > is defined in bits 10-12. AFAIK this stuff is still undocumented so I decided > to try to brute-force through all possible combinations. > > I tried to patch both 'board/sunxi/Kconfig' and 'board/sunxi/gmac.c' to be > able to define 'CONFIG_GMAC_RX_DELAY' in defconfigs. Then I let a script > create 64 different u-boot versions as debian packages to be able to test > them automatically. It seems to make a difference. Currently I test an Olimex > Lime2 and will provide results later (each test run takes approx. 90 seconds > including reboot, 30 seconds iperf test, exchange of u-boot and next > automated reboot). > > Can anyone please tell me whether these 2 u-boot modifications against > v2015.04 (http://pastebin.com/adiWjzya) are correct to modify bits 5-7 of > GMAC clk register: > > --- > diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig > index 2fcab60..4623de6 100644 > --- a/board/sunxi/Kconfig > +++ b/board/sunxi/Kconfig > @@ -451,4 +451,10 @@ config GMAC_TX_DELAY > ---help--- > Set the GMAC Transmit Clock Delay Chain value. > > +config GMAC_RX_DELAY > + int "GMAC Receive Clock Delay Chain" > + default 0 > + ---help--- > + Set the GMAC Reveice Clock Delay Chain value. > + > endif > diff --git a/board/sunxi/gmac.c b/board/sunxi/gmac.c > index 8849132..1bce3ce 100644 > --- a/board/sunxi/gmac.c > +++ b/board/sunxi/gmac.c > @@ -26,6 +26,8 @@ int sunxi_gmac_initialize(bd_t *bis) > CCM_GMAC_CTRL_GPIT_RGMII); > setbits_le32(&ccm->gmac_clk_cfg, > CCM_GMAC_CTRL_TX_CLK_DELAY(CONFIG_GMAC_TX_DELAY)); > + setbits_le32(&ccm->gmac_clk_cfg, > + CCM_GMAC_CTRL_RX_CLK_DELAY(CONFIG_GMAC_RX_DELAY)); > #else > setbits_le32(&ccm->gmac_clk_cfg, CCM_GMAC_CTRL_TX_CLK_SRC_MII | > CCM_GMAC_CTRL_GPIT_MII); > -- > > Regards, > > Thomas
Sound interesting. How did your test runs work out? Regards, Timo -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
