On Fri, Jun 26, 2015 at 11:00:10AM +0200, Roy Spliet wrote: > The TIMING_CFG register was previously statically set to a magic value > (extracted from Allwinner's BSP) when initializing the NAND controller. > Now that we have more details about the TIMING_CFG register layout > (extracted from the A83 user manual) we can dynamically calculate the > appropriate value for each NAND chip and set it when selecting the > chip. > > Signed-off-by: Roy Spliet <[email protected]> > Acked-by: Boris Brezillon <[email protected]> > > --- > V2: > - Fix crippled comments > > V3: > - Warn for invalid timings > - Style > > V4: > - Make better use of return types > - Style and comments > - Remove superfluous initialisation > > V5: > - Tidy up macros
Pushed both to l2-mtd.git. Thanks! Brian -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
