Hi, On Fri, Dec 11, 2015 at 1:26 AM, <[email protected]> wrote: > I am able to have a 32Khz signal output from PI12 if I add a pullup > definition to > > clk_out_a_pins_a: clk_out_a@0 { > allwinner,pins = "PI12"; > allwinner,function = "clk_out_a"; > allwinner,drive = <SUN4I_PINCTRL_10_MA>; > /* allwinner,pull = <SUN4I_PINCTRL_NO_PULL>; */ > allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; > > in the file sun71-a20-dtsi > > Clearly the rising front is a capacitor charge slope, but it is at 32Khz, > the falling front is correct
AFAIK board designs using this all have an external pull-up resistor. Maybe this pin is open-drain by design? Also, for higher clock rates you should increase the drive strength. 30 mA should be good enough for clock rates up to 50 MHz. ChenYu -- You received this message because you are subscribed to the Google Groups "linux-sunxi" group. To unsubscribe from this group and stop receiving emails from it, send an email to [email protected]. For more options, visit https://groups.google.com/d/optout.
